Research output per year
Research output per year
Personal profile
Research interests
Electronic & Computer Engineering - Very large-scale integration (VLSI)
Electronic & Computer Engineering - Integrated circuits and systems
Electronic & Computer Engineering - Mixed-signal/analog integrated circuit (IC)
Electronic & Computer Engineering - Internet of Things (IoT)
Electronic & Computer Engineering - Artificial intelligence
Electronic & Computer Engineering - Integrated circuits and systems
Electronic & Computer Engineering - Mixed-signal/analog integrated circuit (IC)
Electronic & Computer Engineering - Internet of Things (IoT)
Electronic & Computer Engineering - Artificial intelligence
Expertise related to UN Sustainable Development Goals
In 2015, UN member states agreed to 17 global Sustainable Development Goals (SDGs) to end poverty, protect the planet and ensure prosperity for all. This person’s work contributes towards the following SDG(s):
Related documents
Education/Academic qualification
PhD in Electronic and Computer Engineering, PhD, The Hong Kong University of Science and Technology
2016
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Collaborations and top research areas from the last five years
Recent external collaboration on country/territory level. Dive into details by clicking on the dots or
Research output
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An Energy Efficient 4-bit SRAM Compute-in-Memory Macro With Tunable Reference Charge Injection SAR ADC
Shah, I., Zheng, H., Abdullah, M., Sarfraz, K. & Chan, M., 28 Oct 2025, (E-pub ahead of print) In: IEEE Transactions on Circuits and Systems I: Regular Papers. 11219665.Research output: Contribution to journal › Journal Article › peer-review
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Reusing Charge Injection Cells in SAR ADC for Offset Cancellation
Shah, I., Zheng, H., Sarfraz, K. & Chan, M., 2025, In: Electronics Letters. 61, 1, 5 p., e70500.Research output: Contribution to journal › Letter › peer-review
Open Access -
An Efficient 6TP SRAM-Based CIM Macro with Column ADCs for Binarized Neural Networks
Shah, I., Sarfraz, K. & Chan, M., 1 May 2024, In: IEEE Transactions on Circuits and Systems II: Express Briefs. 71, 5, p. 2509-2513 5 p.Research output: Contribution to journal › Journal Article › peer-review
12 Citations (Scopus) -
8.5 A Scalable Adaptive ADC/DSP-Based 1.25-to-56Gbps/112Gbps High-Speed Transceiver Architecture Using Decision-Directed MMSE CDR in 16nm and 7nm
Xu, D., Kou, Y., Lai, P., Cheng, Z., Cheung, T. Y., Moser, L., Zhang, Y., Liu, X., Lam, M. P., Jia, H., Pan, Q., Szeto, W. H., Tang, C. F., Mak, K. F., Sarfraz, K., Zhu, T., Kwan, M., Au, E. Y. L., Conroy, C. & Chan, K. K., 13 Feb 2021, 2021 IEEE International Solid-State Circuits Conference, ISSCC 2021 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., p. 134-136 3 p. 9366063. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 64).Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review
36 Citations (Scopus) -
A 1.2V-to-0.4V 3.2GHz-to-14.3MHz power-efficient 3-port register file in 65-nm CMOS
Sarfraz, K. & Chan, M., Feb 2017, In: IEEE Transactions on Circuits and Systems I: Regular Papers. 64, 2, p. 360-372 13 p., 7775079.Research output: Contribution to journal › Journal Article › peer-review
6 Citations (Scopus)
Awards
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Thetos Early Career Teaching Award Honorable Mention 2024-2025
SARFRAZ, K. (Recipient), Dec 2025
Prize: Honorary Award
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Teaching Excellence Appreciation Award (MSc Program in IC Design Engineering) – HKUST, Hong Kong, 2023.
SARFRAZ, K. (Recipient), Dec 2024
Prize: Honorary Award