Personal profile
Research interests
Electronic & Computer Engineering - 2-D devices and circuits
Electronic & Computer Engineering - AI technologies and systems
Electronic & Computer Engineering - Quantum computing
Position Held
Director of Academy for Continuing Education
Associate Director of Institute of Integrated Circuits and Systems
Related documents
Education/Academic qualification
PhD in Electrical Engineering, PhD, University of California, Berkeley
1995
Expertise related to UN Sustainable Development Goals
In 2015, UN member states agreed to 17 global Sustainable Development Goals (SDGs) to end poverty, protect the planet and ensure prosperity for all. This person’s work contributes towards the following SDG(s):
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SDG 2 Zero Hunger -
SDG 3 Good Health and Well-being -
SDG 4 Quality Education -
SDG 7 Affordable and Clean Energy -
SDG 9 Industry, Innovation, and Infrastructure -
SDG 12 Responsible Consumption and Production
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Collaborations and top research areas from the last five years
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Joint Laboratory of Microelectronics
LAW, M. Y. (CoI), YEUNG, C. F. (CoI), POON, A. W. O. (CoPI), SHI, B. E. (CoPI), CHEN, K. J. (PI), WONG, M. H. (CoPI), YUE, C. P. (CoPI), SHAO, Q. (CoPI), SHEN, Y. (CoPI), XIE, Z. (CoPI), WONG, A. K. F. (CoI), CHAN, M. S. (CoPI), YAO, S. (CoPI), KWOK, K. C. (CoI), WONG, C. K. (CoI), LEE, P. M. W. (CoI), CHAN, T. S. (CoI), LI, H. (CoI), KWOK, H. C. (CoI), CHEUNG, T. L. (CoI), YIP, P. K. (CoI), MAN, P. K. R. (CoI), ZHAO, S. (CoI), LAO, S. Y. (CoI), LEE, W. T. (CoI), PUN, Y. C. P. (CoI), LEE, R.S.-W. (CoPI), CHENG, K.-T. T. (CoPI) & XIE, Y. (CoPI)
Joint Laboratory Funding Scheme
1/01/24 → 31/12/28
Project: Research
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Stacked Double-Gate Nanosheet Transistor Technology with Layered 2D Material
CHAN, M. S. (PI)
1/01/24 → 31/12/26
Project: Research
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AI Chip Centers for Emerging Smart Systems (ACCESS)
WONG, M. D. F. (PI), CHAI, Y. (Team member), KWOK, H. S. H. (Team member), ROSENBAUM, E. (Team member), TSE, D. N. C. (Team member), XU, C. R. (Team member), ANDRIEU, F. (CoI), BOYD, S. P. (CoI), YU, S. (Team member), YOUNG, E. F. Y. (CoI), LUO, P. (Team member), YU, B. (Team member), WONG, P. H. S. (PI), CHEN, D. (CoI), TSUI, C. Y. (CoI), ZHANG, W. (CoI), XU, J. (CoI), LAM, E. (PI), LI, H. H. (Team member), MICHALLET, J.-E. (Team member), HUANG, J. (Team member), CHAN, M. S. (PI), IEONG, M. (Team member), MURMANN, B. (CoI), WONG, N. (CoI), CHENG, K.-T. T. (PI), HWU, W.-M. (Team member) & CHEN, Y. (Team member)
1/09/20 → 31/08/30
Project: Research
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Cryogenic Behavior of 2D Molybdenum Disulfide (MoS2) Transistors
CHAN, M. S. (PI)
1/01/23 → 31/12/25
Project: Research
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Development of Double-Gate Oxide Thin-Film Transistor Backplane Technology for Micro-LED Display
ZHANG, J. (CoI), CHAN, M. S. (PI), DAI, S. Q. (CoI) & ZHANG, Y. (CoI)
Innovation and Technology Commission, Shenzhen Refond Optoelectronics Co. Ltd
1/08/22 → 31/07/24
Project: Research
Research output
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Innovative Superlattice Patterns in MOSFET Channel for Improved Subthreshold Swing Performance
Nouribayat, R., Abbasi, A. & Chan, M., 14 Feb 2026, In: Arabian Journal for Science and Engineering. 10 p.Research output: Contribution to journal › Journal Article › peer-review
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Low breakdown field and high ionization index in ReSe2 avalanche field-effect transistors
Zhang, J., Wang, J., Liu, D., Andreev, M., PENG, Z., WEI, J., Bozcali, A. E., Jain, S., Zheng, H., Avsar, A., Zhang, M., CHAN, M. & Ang, K.-W., Feb 2026, In: Nature Communication. 22 p.Research output: Contribution to journal › Journal Article › peer-review
Open Access -
PHIMO-NN: Compact Modeling by Fusing Device Physics and Neural Networks for One-Shot Parameterization
Peng, B., Zhang, F., Dai, W., Wu, H., Cheng, G., Wang, R., Chan, M. & Zhang, L., Feb 2026, In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 45, 2, p. 795-805 11 p., 11084862.Research output: Contribution to journal › Journal Article › peer-review
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Simulation Study on the Scalability of Channel-All-Around Reconfigurable Field-Effect Transistors With Gate-Controlled Polarity
Huo, R., Ou, S., Wu, Z., Zhang, H., Lv, B., Shao, Y., Ma, Z., Zhang, M., Chan, M. & Zhou, C., 28 Jan 2026, (E-pub ahead of print) In: IEEE Journal of the Electron Devices Society. p. 93-101 9 p.Research output: Contribution to journal › Journal Article › peer-review
Open Access -
Single transistor-control low-dropout regulator: [United States]
MOK, K. T. P. (Inventor), CHAN, M. S. J. (Key Inventor), MAN, T. Y. (Inventor), LEUNG, C. Y. (Inventor) & LEUNG, K. N. (Inventor), 10 May 2011, IPC No. G05F 1/40, Patent No. RE42335, 7 Mar 2006, Priority date 7 Mar 2005, Priority No. US60/658,752Research output: Patent
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香港科技大學在建構研究平台和培育創新創業生態系統的經驗
CHAN, M. S. (Invited speaker)
27 Nov 2025Activity: Talk or presentation › Contributed
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The Journey of MOSFET: From Planar to Stacked 3D Transistors
CHAN, M. S. (Invited speaker)
28 Oct 2025 → 30 Oct 2025Activity: Talk or presentation › Keynote
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FROM TECHNOLOGY TO CIRCUIT DESIGN IN STACKED COMPLEMENTARY FIELD-EFFECT TRANSISTORS
CHAN, M. S. (Invited speaker)
23 Oct 2025Activity: Talk or presentation › Invited
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THE JOURNEY OF MOSFET: FROM PLANAR TO STACKED 3D TRANSISTORS
CHAN, M. S. (Invited speaker)
15 Sept 2025Activity: Talk or presentation › Keynote
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From 3D Transistors to Stacked Complementary Field Effect Transistors (CFET)
CHAN, M. S. (Invited speaker)
23 May 2025Activity: Talk or presentation › Keynote
Awards
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Department Teaching Excellence Appreciation Award
CHAN, M. S. (Recipient), Dec 2024
Prize: Honorary Award
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Michael G. Gale Medal for Distinguished Teaching
CHAN, M. S. (Recipient), Dec 2024
Prize: Honorary Award
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