Projects per year
Personal profile
Research interests
Electronic & Computer Engineering - Computer architecture
Electronic & Computer Engineering - Field-programmable gate array (FPGA) based design
Electronic & Computer Engineering - Hardware/software codesign
Electronic & Computer Engineering - Field-programmable gate array (FPGA) based design
Electronic & Computer Engineering - Hardware/software codesign
Expertise related to UN Sustainable Development Goals
In 2015, UN member states agreed to 17 global Sustainable Development Goals (SDGs) to end poverty, protect the planet and ensure prosperity for all. This person’s work contributes towards the following SDG(s):
Related documents
Education/Academic qualification
PhD in Electrical and Electronic Engineering, PhD, The University of Hong Kong
2020
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Collaborations and top research areas from the last five years
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Projects
- 1 Active
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Hardware Acceleration for Convex Conic Optimization Solvers via Co-design and Automated FPGA Synthesis
WANG, M. (CoI) & CHENG, K.-T. T. (PI)
1/01/26 → 31/12/28
Project: Research
Research output
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A Hardware-Software Design Framework for SpMV Acceleration with Flexible Access Pattern Portfolio
Wu, Z., Wang, M. & So, H. K. H., 2025, Proceedings - 2025 IEEE International Symposium on High Performance Computer Architecture, HPCA 2025. IEEE Computer Society, p. 836-848 13 p. (Proceedings - International Symposium on High-Performance Computer Architecture).Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review
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GraFlex: Flexible Graph Processing on FPGAs through Customized Scalable Interconnection Network
Su, C., Du, L., Liang, T., Lin, Z., Wang, M., Sinha, S. & Zhang, W., 1 Apr 2024, FPGA 2024 - Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays. Association for Computing Machinery, Inc, p. 143-153 11 p. (FPGA 2024 - Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays).Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review
Open Access2 Citations (Scopus) -
Multi-Issue Butterfly Architecture for Sparse Convex Quadratic Programming
Mcinerney, I., Stellato, B., Boyd, S., So, K.-H. H., Cheng, K.-T., Tu, F. & Wang, M., Jan 2024.Research output: Contribution to conference › Conference Paper › peer-review
2 Citations (Scopus) -
Multi-Issue Butterfly Architecture for Sparse Convex Quadratic Programming
Wang, M., McInerney, I., Stellato, B., Tu, F., Boyd, S., So, H. K. H. & Cheng, K. T., 2024, Proceedings - 2024 57th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2024. IEEE Computer Society, p. 1574-1587 14 p. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO).Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review
2 Citations (Scopus) -
Model-Platform Optimized Deep Neural Network Accelerator Generation through Mixed-Integer Geometric Programming
Ding, Y., Wu, J., Gao, Y., Wang, M. & So, H. K. H., 2023, Proceedings - 31st IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2023. Institute of Electrical and Electronics Engineers Inc., p. 83-93 11 p. (Proceedings - 31st IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2023).Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review
5 Citations (Scopus)