Personal profile
Research interests
Electronic & Computer Engineering - Design automation
Electronic & Computer Engineering - Heterogeneous Computing
Electronic & Computer Engineering - Field-programmable gate array (FPGA) based design
Electronic & Computer Engineering - Embedded systems
Position Held
Associate Director of HKUST-SDU Intelligent Computing Joint Laboratory
Associate Director of HKUST and Intel Joint Laboratory
Related documents
Education/Academic qualification
PhD in Computer Engineering, PhD, Princeton University
2009
Expertise related to UN Sustainable Development Goals
In 2015, UN member states agreed to 17 global Sustainable Development Goals (SDGs) to end poverty, protect the planet and ensure prosperity for all. This person’s work contributes towards the following SDG(s):
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SDG 7 Affordable and Clean Energy -
SDG 9 Industry, Innovation, and Infrastructure -
SDG 12 Responsible Consumption and Production
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Collaborations and top research areas from the last five years
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A Cross-Stage Multimodal Pre-Trained Circuit Encoder Generalized to Support Multiple EDA Applications
ZHANG, W. (CoI) & XIE, Z. (PI)
1/01/26 → 31/12/28
Project: Research
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Next Generation EDA
ZHANG, W. (CoPI)
RGC - Theme-based Research Scheme
1/01/26 → 31/12/30
Project: Research
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AutoLLM-Opt: Automated Search for Ascend-Optimized LLM Components and Execution Strategies
ZHANG, W. (PI)
30/10/25 → 29/10/26
Project: Research
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Research on the Technology for Integration and Optimization of Chiplet Architecture
ZHANG, W. (PI) & XIE, Z. (CoI)
Innovation and Technology Commission, Shenzhen Meta Chip Technology Co., Ltd, Shenzhen Bionics Technology Co., Ltd
1/01/25 → 31/12/26
Project: Research
Research output
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A Cluster-Based Distributed Memory Architecture for CGRAs
LI, S., Tan, C., LI, Z., GE, J., LIANG, J., YANG, H., DU, L., XU, J. & ZHANG, W., 20 Apr 2026. 3 p.Research output: Contribution to conference › Conference Paper › peer-review
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CEGraph: Cache-Efficient Management for Streaming Graph Processing
Mao, F., Xie, Z., Nie, L., Zhang, Y., Liu, H., Liao, X., Jin, H., Zhang, W., Guo, Y. & Liu, J., Jan 2026, In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 45, 1, 11018516.Research output: Contribution to journal › Journal Article › peer-review
Open Access -
DAPO: Design Structure-Aware Pass Ordering for HLS via Contrastive and Reinforcement Learning
GE, J., DU, L., Anaparty, L., LI, S., LIANG, T., AHMAD, A., CHATURVEDI, V., SHARAD, S., XIE, Z., XU, J. & ZHANG, W., 22 Apr 2026.Research output: Contribution to conference › Conference Paper › peer-review
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DRACO: A Hardware-Efficient Robot Rigid Body Dynamics Accelerator with Precision-Aware Quantization Framework
LIU, X., LIANG, J., ZHANG, Y., DU, L., MA, C., YU, H., XU, J. & ZHANG, W., 4 Mar 2026, 2026 IEEE International Symposium on High Performance Computer Architecture, HPCA 2026. IEEE Computer Society, 13 p. 11408528. (Proceedings - International Symposium on High-Performance Computer Architecture).Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review
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EvolveGen: Algorithmic Level Hardware Model Checking Benchmark Generation through Reinforcement Learning
Hu, G., Zhou, X., Zhang, W. & Zhang, H., 2026, Tools and Algorithms for the Construction and Analysis of Systems - 32nd International Conference, TACAS 2026, Held as Part of the International Joint Conferences on Theory and Practice of Software, ETAPS 2026, Proceedings. Junges, S. & Katz, G. (eds.). Springer Science and Business Media Deutschland GmbH, p. 334-352 19 p. (Lecture Notes in Computer Science; vol. 16506 LNCS).Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review
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Streamlining FPGA Development: Challenges and Opportunities of Agile Design Flows, Keynote
ZHANG, W. (Invited speaker)
5 Dec 2025Activity: Talk or presentation › Keynote
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IEEE Transactions On Circuits and Systems Part II (TCASII) (Journal)
ZHANG, W. (Associate Editor)
1 Jan 2024 → 1 Jan 2025Activity: Publication peer-review and editorial work › Editorial work
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IEEE Transactions on Circuits and Systems for Artificial Intelligence (Journal)
ZHANG, W. (Associate Editor)
1 Jan 2024 → …Activity: Publication peer-review and editorial work › Editorial work
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Embedded System Letter (Journal)
ZHANG, W. (Associate Editor)
1 Jan 2024 → 2025Activity: Publication peer-review and editorial work › Editorial work
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ACM Transactions on Reconfigurable Technology and Systems (TRETS) (Journal)
ZHANG, W. (Associate Editor)
1 Jan 2019 → …Activity: Publication peer-review and editorial work › Editorial work
Awards
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Second Place, EDAthon 2022 Programming Competition on Electronic Design Automation
ZHANG, W. (Recipient), Oct 2022
Prize: Honorary Award
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William J. McCalla Best Paper Award-Front End
ZHANG, W. (Recipient), Nov 2017
Prize: Best Paper Award and Prize