Projects per year
Personal profile
Research interests
Electronic & Computer Engineering - Computer architecture
Electronic & Computer Engineering - Design automation
Electronic & Computer Engineering - Heterogeneous Computing
Electronic & Computer Engineering - Field-programmable gate array (FPGA) based design
Electronic & Computer Engineering - Embedded systems
Electronic & Computer Engineering - Design automation
Electronic & Computer Engineering - Heterogeneous Computing
Electronic & Computer Engineering - Field-programmable gate array (FPGA) based design
Electronic & Computer Engineering - Embedded systems
Position Held
Associate Director of Institute of Integrated Circuits and Systems
Associate Director of HKUST-SDU Intelligent Computing Joint Laboratory
Associate Director of HKUST-SDU Intelligent Computing Joint Laboratory
Expertise related to UN Sustainable Development Goals
In 2015, UN member states agreed to 17 global Sustainable Development Goals (SDGs) to end poverty, protect the planet and ensure prosperity for all. This person’s work contributes towards the following SDG(s):
Related documents
Education/Academic qualification
PhD in Computer Engineering, PhD, Princeton University
2009
Fingerprint
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Collaborations and top research areas from the last five years
Recent external collaboration on country/territory level. Dive into details by clicking on the dots or
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A Cross-Stage Multimodal Pre-Trained Circuit Encoder Generalized to Support Multiple EDA Applications
ZHANG, W. (CoI) & XIE, Z. (PI)
1/01/26 → 31/12/28
Project: Research
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AutoLLM-Opt: Automated Search for Ascend-Optimized LLM Components and Execution Strategies
ZHANG, W. (PI)
30/10/25 → 29/10/26
Project: Research
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Register-Transfer Level Early Timing Prediction and Optimization by Machine Learning in Electronic Design Automation
ZHANG, W. (CoI) & XIE, Z. (PI)
1/01/25 → 31/12/27
Project: Research
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Research on the Technology for Integration and Optimization of Chiplet Architecture
ZHANG, W. (PI) & XIE, Z. (CoI)
1/01/25 → 31/12/26
Project: Research
Research output
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AM-Align: Globally Optimal Estimation of Accelerometer-Magnetometer Misalignment
Hu, X., Wu, J., Xue, B., Zhu, Y., Jia, M., Qi, Y., Jiang, Y., Tan, P. & Zhang, W., 2025, In: IEEE Transactions on Instrumentation and Measurement. 74, 1010710.Research output: Contribution to journal › Journal Article › peer-review
1 Citation (Scopus) -
AutoClock: Automated Clock Management for Power-Efficient HLS Designs on FPGAs
LIANG, J., DU, L., ZHOU, X., LIN, Z., XU, J. & ZHANG, W., 15 Sept 2025, 2025 62nd ACM/IEEE Design Automation Conference, DAC 2025. Institute of Electrical and Electronics Engineers Inc., 11133279. (Proceedings - Design Automation Conference).Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review
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BEAM: A Multi-Channel Optical Interconnect for Multi-GPU Systems
Yang, C., Hu, B., Chen, P., Liu, Y., Zhang, W. & Xu, J., 2025, 2025 Design, Automation and Test in Europe Conference, DATE 2025 - Proceedings. Institute of Electrical and Electronics Engineers Inc., (Proceedings -Design, Automation and Test in Europe, DATE).Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review
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CEGraph: Cache-Efficient Management for Streaming Graph Processing
Mao, F., Xie, Z., Nie, L., Zhang, Y., Liu, H., Liao, X., Jin, H., Zhang, W., Guo, Y. & Liu, J., 2025, (Accepted/In press) In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.Research output: Contribution to journal › Journal Article › peer-review
Open Access -
DAHE: Parameter-adaptive and memory efficient FPGA acceleration of homomorphic encryption
Zhu, Y., You, H., Zhang, W., Xu, J., Lou, Q., Yan, S. & Ju, L., Aug 2025, In: IEEE Transactions on Computers. 74, 8, p. 2687-2701 15 p., 11008860.Research output: Contribution to journal › Journal Article › peer-review
Activities
- 10 Editorial work
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IEEE Transactions On Circuits and Systems Part II (TCASII) (Journal)
ZHANG, W. (Associate Editor)
1 Jan 2024 → 1 Jan 2025Activity: Publication peer-review and editorial work › Editorial work
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IEEE Transactions on Circuits and Systems for Artificial Intelligence (Journal)
ZHANG, W. (Associate Editor)
1 Jan 2024 → …Activity: Publication peer-review and editorial work › Editorial work
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Embedded System Letter (Journal)
ZHANG, W. (Associate Editor)
1 Jan 2024 → …Activity: Publication peer-review and editorial work › Editorial work
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ACM Transactions on Reconfigurable Technology and Systems (TRETS) (Journal)
ZHANG, W. (Associate Editor)
1 Jan 2019 → …Activity: Publication peer-review and editorial work › Editorial work
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) (Journal)
ZHANG, W. (Associate Editor)
1 Jan 2018 → …Activity: Publication peer-review and editorial work › Editorial work
Awards
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Second Place, EDAthon 2022 Programming Competition on Electronic Design Automation
ZHANG, W. (Recipient), Oct 2022
Prize: Honorary Award
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William J. McCalla Best Paper Award-Front End
ZHANG, W. (Recipient), Nov 2017
Prize: Best Paper Award and Prize