Efficient High-level Routing Congestion Prediction and Mitigation for FPGA HLS-based Design

ZHANG, Wei (PI)

Department of Electronic and Computer Engineering

Project: Research

Chinese Project Title

基於FPGA HLS設計的高效路由擁塞預測和緩解

Status	Finished
Effective start/end date	1/01/20 → 31/12/22

Hard-ODT: Hardware-Friendly Online Decision Tree Learning Algorithm and System
Lin, Z., Sinha, S. & Zhang, W., 1 Nov 2021, In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 40, 11, p. 2279-2292 14 p.
Research output: Contribution to journal › Journal Article › peer-review

Open Access
5 Link opens in a new tab Citations (Scopus)