750MS/S NMOS LATCHED COMPARATOR.

Summary form only given. The design of analog circuits integrated in a polysilicon gate NMOS technology with 1 mu m effective channel length devices is described. In particular, a latched comparator with 4-b input resolution at 750 MS/s and a wideband amplifier with 10 dB of voltage gain over a bandwidth of 1. 25 GHz, when driving 130 fF of on-chip capacitance, are reported. The comparator was designed primarily for application to high-speed flash A/D conversion, but is also suitable for use in integrated broadband fiber-optic receivers. Its circuit configuration differs from previous designs in that negative feedback is used in the preamplifier section to trade gain for bandwidth.