A 1-mW 12-Gb/s continuous-time adaptive passive equalizer in 90-nm CMOS

Dong Hun Shin; Ji Eun Jang; Frank O'Mahony; C. Patrick Yue

doi:10.1109/CICC.2009.5280898

A 1-mW 12-Gb/s continuous-time adaptive passive equalizer in 90-nm CMOS

Dong Hun Shin, Ji Eun Jang, Frank O'Mahony, C. Patrick Yue

Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review

12 Citations (Scopus)

Abstract

This paper presents a frequency-domain adaptive passive equalizer for high-speed receivers. A local control loop, without feedback from the final receiver output, is used to automatically adjust the gain compensation for different channel characteristics. As a result, the equalizer does not rely on the recovered clock signal. Implemented in a 90-nm digital CMOS process, the equalizer can provide up to 13 dB of gain compensation with 6 dB of tuning range while consuming 1 mW from a 1-V supply. The equalizer is able to open the data eye of a 12-Gb/s PRBS signal after a 72-inch RG-58 coaxial cable and an 8-inch FR-4 trace, whose attenuations at 6 GHz are 10.8 and 13 dB, respectively.

Original language	English
Title of host publication	2009 IEEE Custom Integrated Circuits Conference, CICC '09
Pages	117-120
Number of pages	4
DOIs	https://doi.org/10.1109/CICC.2009.5280898
Publication status	Published - 2009
Externally published	Yes
Event	2009 IEEE Custom Integrated Circuits Conference, CICC '09 - San Jose, CA, United States Duration: 13 Sept 2009 → 16 Sept 2009

Publication series

Name	Proceedings of the Custom Integrated Circuits Conference
ISSN (Print)	0886-5930

Conference

Conference	2009 IEEE Custom Integrated Circuits Conference, CICC '09
Country/Territory	United States
City	San Jose, CA
Period	13/09/09 → 16/09/09

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10.1109/CICC.2009.5280898

Cite this

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title = "A 1-mW 12-Gb/s continuous-time adaptive passive equalizer in 90-nm CMOS",

abstract = "This paper presents a frequency-domain adaptive passive equalizer for high-speed receivers. A local control loop, without feedback from the final receiver output, is used to automatically adjust the gain compensation for different channel characteristics. As a result, the equalizer does not rely on the recovered clock signal. Implemented in a 90-nm digital CMOS process, the equalizer can provide up to 13 dB of gain compensation with 6 dB of tuning range while consuming 1 mW from a 1-V supply. The equalizer is able to open the data eye of a 12-Gb/s PRBS signal after a 72-inch RG-58 coaxial cable and an 8-inch FR-4 trace, whose attenuations at 6 GHz are 10.8 and 13 dB, respectively.",

author = "Shin, \{Dong Hun\} and Jang, \{Ji Eun\} and Frank O'Mahony and Yue, \{C. Patrick\}",

year = "2009",

doi = "10.1109/CICC.2009.5280898",

language = "English",

isbn = "9781424440726",

series = "Proceedings of the Custom Integrated Circuits Conference",

pages = "117--120",

booktitle = "2009 IEEE Custom Integrated Circuits Conference, CICC '09",

note = "2009 IEEE Custom Integrated Circuits Conference, CICC '09 ; Conference date: 13-09-2009 Through 16-09-2009",

}

Shin, DH, Jang, JE, O'Mahony, F & Yue, CP 2009, A 1-mW 12-Gb/s continuous-time adaptive passive equalizer in 90-nm CMOS. in 2009 IEEE Custom Integrated Circuits Conference, CICC '09., 5280898, Proceedings of the Custom Integrated Circuits Conference, pp. 117-120, 2009 IEEE Custom Integrated Circuits Conference, CICC '09, San Jose, CA, United States, 13/09/09. https://doi.org/10.1109/CICC.2009.5280898

A 1-mW 12-Gb/s continuous-time adaptive passive equalizer in 90-nm CMOS. / Shin, Dong Hun; Jang, Ji Eun; O'Mahony, Frank et al.
2009 IEEE Custom Integrated Circuits Conference, CICC '09. 2009. p. 117-120 5280898 (Proceedings of the Custom Integrated Circuits Conference).

Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review

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AB - This paper presents a frequency-domain adaptive passive equalizer for high-speed receivers. A local control loop, without feedback from the final receiver output, is used to automatically adjust the gain compensation for different channel characteristics. As a result, the equalizer does not rely on the recovered clock signal. Implemented in a 90-nm digital CMOS process, the equalizer can provide up to 13 dB of gain compensation with 6 dB of tuning range while consuming 1 mW from a 1-V supply. The equalizer is able to open the data eye of a 12-Gb/s PRBS signal after a 72-inch RG-58 coaxial cable and an 8-inch FR-4 trace, whose attenuations at 6 GHz are 10.8 and 13 dB, respectively.

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BT - 2009 IEEE Custom Integrated Circuits Conference, CICC '09

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ER -

A 1-mW 12-Gb/s continuous-time adaptive passive equalizer in 90-nm CMOS

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