A 10.60 μW 150 GOPS Mixed-Bit-Width Sparse CNN Accelerator for Life-Threatening Ventricular Arrhythmia Detection

Yifan Qin; Zhenge Jia; Zheyu Yan; Jay Mok; Manto Yung; Yu Liu; Xuejiao Liu; Wujie Wen; Luhong Liang; Kwang Ting Tim Cheng; Xiaobo Sharon Hu; Yiyu Shi

doi:10.1145/3658617.3698479

A 10.60 μW 150 GOPS Mixed-Bit-Width Sparse CNN Accelerator for Life-Threatening Ventricular Arrhythmia Detection

Yifan Qin, Zhenge Jia, Zheyu Yan, Jay Mok, Manto Yung, Yu Liu, Xuejiao Liu, Wujie Wen, Luhong Liang, Kwang Ting Tim Cheng, Xiaobo Sharon Hu, Yiyu Shi^*

^*Corresponding author for this work

Office of the Vice-President for Research and Development

Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review

Abstract

This paper proposes an ultra-low power, mixed-bit-width sparse convolutional neural network (CNN) accelerator to accelerate ventricular arrhythmia (VA) detection. The chip achieves 50% sparsity in a quantized 1D CNN using a sparse processing element (SPE) architecture. Measurement on the prototype chip TSMC 40nm CMOS low-power (LP) process for the VA classification task demonstrates that it consumes 10.60 μW of power while achieving a performance of 150 GOPS and a diagnostic accuracy of 99.95%. The computation power density is only 0.57 μW/mm², which is 14.23× smaller than state-of-the-art works, making it highly suitable for implantable and wearable medical devices.

Original language	English
Title of host publication	ASP-DAC 2025 - 30th Asia and South Pacific Design Automation Conference, Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	315-316
Number of pages	2
ISBN (Electronic)	9798400706356
DOIs	https://doi.org/10.1145/3658617.3698479
Publication status	Published - 4 Mar 2025
Event	30th Asia and South Pacific Design Automation Conference, ASP-DAC 2025 - Tokyo, Japan Duration: 20 Jan 2025 → 23 Jan 2025

Publication series

Name	Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
ISSN (Print)	2153-6961
ISSN (Electronic)	2153-697X

Conference

Conference	30th Asia and South Pacific Design Automation Conference, ASP-DAC 2025
Country/Territory	Japan
City	Tokyo
Period	20/01/25 → 23/01/25

Bibliographical note

Publisher Copyright:
© 2025 Copyright is held by the owner/author(s). Publication rights licensed to ACM.

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10.1145/3658617.3698479

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Qin, Y., Jia, Z., Yan, Z., Mok, J., Yung, M., Liu, Y., Liu, X., Wen, W., Liang, L., Cheng, K. T. T., Hu, X. S., & Shi, Y. (2025). A 10.60 μW 150 GOPS Mixed-Bit-Width Sparse CNN Accelerator for Life-Threatening Ventricular Arrhythmia Detection. In ASP-DAC 2025 - 30th Asia and South Pacific Design Automation Conference, Proceedings (pp. 315-316). (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1145/3658617.3698479

Qin, Yifan ; Jia, Zhenge ; Yan, Zheyu et al. / A 10.60 μW 150 GOPS Mixed-Bit-Width Sparse CNN Accelerator for Life-Threatening Ventricular Arrhythmia Detection. ASP-DAC 2025 - 30th Asia and South Pacific Design Automation Conference, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2025. pp. 315-316 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

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title = "A 10.60 μW 150 GOPS Mixed-Bit-Width Sparse CNN Accelerator for Life-Threatening Ventricular Arrhythmia Detection",

abstract = "This paper proposes an ultra-low power, mixed-bit-width sparse convolutional neural network (CNN) accelerator to accelerate ventricular arrhythmia (VA) detection. The chip achieves 50\% sparsity in a quantized 1D CNN using a sparse processing element (SPE) architecture. Measurement on the prototype chip TSMC 40nm CMOS low-power (LP) process for the VA classification task demonstrates that it consumes 10.60 μW of power while achieving a performance of 150 GOPS and a diagnostic accuracy of 99.95\%. The computation power density is only 0.57 μW/mm2, which is 14.23× smaller than state-of-the-art works, making it highly suitable for implantable and wearable medical devices.",

author = "Yifan Qin and Zhenge Jia and Zheyu Yan and Jay Mok and Manto Yung and Yu Liu and Xuejiao Liu and Wujie Wen and Luhong Liang and Cheng, \{Kwang Ting Tim\} and Hu, \{Xiaobo Sharon\} and Yiyu Shi",

note = "Publisher Copyright: {\textcopyright} 2025 Copyright is held by the owner/author(s). Publication rights licensed to ACM.; 30th Asia and South Pacific Design Automation Conference, ASP-DAC 2025 ; Conference date: 20-01-2025 Through 23-01-2025",

year = "2025",

month = mar,

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doi = "10.1145/3658617.3698479",

language = "English",

series = "Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC",

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Qin, Y, Jia, Z, Yan, Z, Mok, J, Yung, M, Liu, Y, Liu, X, Wen, W, Liang, L, Cheng, KTT, Hu, XS & Shi, Y 2025, A 10.60 μW 150 GOPS Mixed-Bit-Width Sparse CNN Accelerator for Life-Threatening Ventricular Arrhythmia Detection. in ASP-DAC 2025 - 30th Asia and South Pacific Design Automation Conference, Proceedings. Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, Institute of Electrical and Electronics Engineers Inc., pp. 315-316, 30th Asia and South Pacific Design Automation Conference, ASP-DAC 2025, Tokyo, Japan, 20/01/25. https://doi.org/10.1145/3658617.3698479

A 10.60 μW 150 GOPS Mixed-Bit-Width Sparse CNN Accelerator for Life-Threatening Ventricular Arrhythmia Detection. / Qin, Yifan; Jia, Zhenge; Yan, Zheyu et al.
ASP-DAC 2025 - 30th Asia and South Pacific Design Automation Conference, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2025. p. 315-316 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review

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AU - Qin, Yifan

AU - Jia, Zhenge

AU - Yan, Zheyu

AU - Mok, Jay

AU - Yung, Manto

AU - Liu, Yu

AU - Liu, Xuejiao

AU - Wen, Wujie

AU - Liang, Luhong

AU - Cheng, Kwang Ting Tim

AU - Hu, Xiaobo Sharon

AU - Shi, Yiyu

PY - 2025/3/4

Y1 - 2025/3/4

N2 - This paper proposes an ultra-low power, mixed-bit-width sparse convolutional neural network (CNN) accelerator to accelerate ventricular arrhythmia (VA) detection. The chip achieves 50% sparsity in a quantized 1D CNN using a sparse processing element (SPE) architecture. Measurement on the prototype chip TSMC 40nm CMOS low-power (LP) process for the VA classification task demonstrates that it consumes 10.60 μW of power while achieving a performance of 150 GOPS and a diagnostic accuracy of 99.95%. The computation power density is only 0.57 μW/mm2, which is 14.23× smaller than state-of-the-art works, making it highly suitable for implantable and wearable medical devices.

AB - This paper proposes an ultra-low power, mixed-bit-width sparse convolutional neural network (CNN) accelerator to accelerate ventricular arrhythmia (VA) detection. The chip achieves 50% sparsity in a quantized 1D CNN using a sparse processing element (SPE) architecture. Measurement on the prototype chip TSMC 40nm CMOS low-power (LP) process for the VA classification task demonstrates that it consumes 10.60 μW of power while achieving a performance of 150 GOPS and a diagnostic accuracy of 99.95%. The computation power density is only 0.57 μW/mm2, which is 14.23× smaller than state-of-the-art works, making it highly suitable for implantable and wearable medical devices.

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BT - ASP-DAC 2025 - 30th Asia and South Pacific Design Automation Conference, Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

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Y2 - 20 January 2025 through 23 January 2025

ER -

Qin Y, Jia Z, Yan Z, Mok J, Yung M, Liu Y et al. A 10.60 μW 150 GOPS Mixed-Bit-Width Sparse CNN Accelerator for Life-Threatening Ventricular Arrhythmia Detection. In ASP-DAC 2025 - 30th Asia and South Pacific Design Automation Conference, Proceedings. Institute of Electrical and Electronics Engineers Inc. 2025. p. 315-316. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). doi: 10.1145/3658617.3698479

A 10.60 μW 150 GOPS Mixed-Bit-Width Sparse CNN Accelerator for Life-Threatening Ventricular Arrhythmia Detection

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