A 115-mW, 0.5-μm CMOS GPS receiver with wide dynamic-range active filters

Derek K. Shaeffer; Arvin R. Shahani; S. S. Mohan; Hirad Samavati; Hamid R. Rategh; Maria Del Mar Hershenson; Min Xu; C. Patrick Yue; Daniel J. Eddleman; Thomas H. Lee

doi:10.1109/4.735706

A 115-mW, 0.5-μm CMOS GPS receiver with wide dynamic-range active filters

Derek K. Shaeffer^*, Arvin R. Shahani, S. S. Mohan, Hirad Samavati, Hamid R. Rategh, Maria Del Mar Hershenson, Min Xu, C. Patrick Yue, Daniel J. Eddleman, Thomas H. Lee

^*Corresponding author for this work

Research output: Contribution to journal › Journal Article › peer-review

95 Citations (Scopus)

Abstract

This paper presents a 115-mW Global Positioning System radio receiver that is implemented in a 0.5μm CMOS technology. The receiver includes the complete analog signal path, comprising a low-noise amplifier, I-Q mixers, on-chip active filters, and 1-bit analog-digital converters. In addition, it includes a low-power phase-locked loop that synthesizes the first local oscillator. The receiver achieves a 2.8-dB noise figure (prelimiter), a 56-dB spurious-free dynamic range, and a 17-dB signal-to-noise ratio for a noncoherent digital back-end implementation when detecting a signal power of -130 dBm at the radio-frequency input.

Original language	English
Pages (from-to)	2219-2230
Number of pages	12
Journal	IEEE Journal of Solid-State Circuits
Volume	33
Issue number	12
DOIs	https://doi.org/10.1109/4.735706
Publication status	Published - Dec 1998
Externally published	Yes

Keywords

Active filters
CMOS amplifiers
CMOS radio receiver
Global Positioning System
Low-IF receiver
Low-noise amplification
Mixers
Radio receiver
Satellite communications
Single-chip radio
Wireless communications

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10.1109/4.735706

Cite this

@article{56eaa2fa50264fe1b4a6aa8aa9928c51,

title = "A 115-mW, 0.5-μm CMOS GPS receiver with wide dynamic-range active filters",

abstract = "This paper presents a 115-mW Global Positioning System radio receiver that is implemented in a 0.5μm CMOS technology. The receiver includes the complete analog signal path, comprising a low-noise amplifier, I-Q mixers, on-chip active filters, and 1-bit analog-digital converters. In addition, it includes a low-power phase-locked loop that synthesizes the first local oscillator. The receiver achieves a 2.8-dB noise figure (prelimiter), a 56-dB spurious-free dynamic range, and a 17-dB signal-to-noise ratio for a noncoherent digital back-end implementation when detecting a signal power of -130 dBm at the radio-frequency input.",

keywords = "Active filters, CMOS amplifiers, CMOS radio receiver, Global Positioning System, Low-IF receiver, Low-noise amplification, Mixers, Radio receiver, Satellite communications, Single-chip radio, Wireless communications",

author = "Shaeffer, \{Derek K.\} and Shahani, \{Arvin R.\} and Mohan, \{S. S.\} and Hirad Samavati and Rategh, \{Hamid R.\} and Hershenson, \{Maria Del Mar\} and Min Xu and Yue, \{C. Patrick\} and Eddleman, \{Daniel J.\} and Lee, \{Thomas H.\}",

year = "1998",

month = dec,

doi = "10.1109/4.735706",

language = "English",

volume = "33",

pages = "2219--2230",

journal = "IEEE Journal of Solid-State Circuits",

issn = "0018-9200",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "12",

}

TY - JOUR

T1 - A 115-mW, 0.5-μm CMOS GPS receiver with wide dynamic-range active filters

AU - Shaeffer, Derek K.

AU - Shahani, Arvin R.

AU - Mohan, S. S.

AU - Samavati, Hirad

AU - Rategh, Hamid R.

AU - Hershenson, Maria Del Mar

AU - Xu, Min

AU - Yue, C. Patrick

AU - Eddleman, Daniel J.

AU - Lee, Thomas H.

PY - 1998/12

Y1 - 1998/12

N2 - This paper presents a 115-mW Global Positioning System radio receiver that is implemented in a 0.5μm CMOS technology. The receiver includes the complete analog signal path, comprising a low-noise amplifier, I-Q mixers, on-chip active filters, and 1-bit analog-digital converters. In addition, it includes a low-power phase-locked loop that synthesizes the first local oscillator. The receiver achieves a 2.8-dB noise figure (prelimiter), a 56-dB spurious-free dynamic range, and a 17-dB signal-to-noise ratio for a noncoherent digital back-end implementation when detecting a signal power of -130 dBm at the radio-frequency input.

AB - This paper presents a 115-mW Global Positioning System radio receiver that is implemented in a 0.5μm CMOS technology. The receiver includes the complete analog signal path, comprising a low-noise amplifier, I-Q mixers, on-chip active filters, and 1-bit analog-digital converters. In addition, it includes a low-power phase-locked loop that synthesizes the first local oscillator. The receiver achieves a 2.8-dB noise figure (prelimiter), a 56-dB spurious-free dynamic range, and a 17-dB signal-to-noise ratio for a noncoherent digital back-end implementation when detecting a signal power of -130 dBm at the radio-frequency input.

KW - Active filters

KW - CMOS amplifiers

KW - CMOS radio receiver

KW - Global Positioning System

KW - Low-IF receiver

KW - Low-noise amplification

KW - Mixers

KW - Radio receiver

KW - Satellite communications

KW - Single-chip radio

KW - Wireless communications

UR - https://www.webofscience.com/wos/woscc/full-record/WOS:000077298100042

UR - https://openalex.org/W2152524071

UR - https://www.scopus.com/pages/publications/0032317766

U2 - 10.1109/4.735706

DO - 10.1109/4.735706

M3 - Journal Article

SN - 0018-9200

VL - 33

SP - 2219

EP - 2230

JO - IEEE Journal of Solid-State Circuits

JF - IEEE Journal of Solid-State Circuits

IS - 12

ER -

A 115-mW, 0.5-μm CMOS GPS receiver with wide dynamic-range active filters

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Keywords

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