Abstract
A 60 GHz frequency generator with implicit ÷3 divider is proposed in this work to improve the system-level efficiency and phase noise. A third-harmonic boosting technique is utilized to simultaneously generate 20GHz and sufficiently strong 60 GHz signals in order to avoid any divider operating at 60 GHz. The prototype is fabricated in 40nm CMOS and exhibits a phase noise of -100 dBc/Hz at 1MHz offset from 60 GHz carrier and 25% tuning range. The phase noise and FoMT (figure-of-merit with tuning range) are improved by 5 dB and 4.6 dB, respectively, compared to state-of-the-art.
| Original language | English |
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| Title of host publication | Proceedings of the 2015 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2015 |
| Editors | Domine Leenaerts |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 279-282 |
| Number of pages | 4 |
| ISBN (Electronic) | 9781479976416 |
| Publication status | Published - 25 Nov 2015 |
| Externally published | Yes |
| Event | IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2015 - Phoenix, United States Duration: 17 May 2015 → 19 May 2015 |
Publication series
| Name | Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium |
|---|---|
| Volume | 2015-November |
| ISSN (Print) | 1529-2517 |
Conference
| Conference | IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2015 |
|---|---|
| Country/Territory | United States |
| City | Phoenix |
| Period | 17/05/15 → 19/05/15 |
Bibliographical note
Publisher Copyright:© 2015 IEEE.
Keywords
- 60 GHz
- divider
- harmonic boost
- harmonic extraction
- mm-wave
- oscillator