A cost analysis framework for multi-core systems with spares

Saeed Shamshiri*, Peter Lisherness, Sung Jui Pan, Kwang Ting Cheng

*Corresponding author for this work

Research output: Chapter in Book/Conference Proceeding/ReportConference Paper published in a bookpeer-review

29 Citations (Scopus)

Abstract

It becomes increasingly difficult to achieve a high manufacturingyieldfor multi-core chips due to larger chip sizes, higher device densities, and greater failure rates. By adding a limited number of spare cores to replace defective cores either before shipment or in the field, the effective yield of the chip and its overall cost can be significantly improved. In this paper, we propose a yield and cost analysis framework to better understand the dependency of a multi-core chip's cost on key parameters such as the number of cores and spares, core yield, and defect coverage of manufacturing and in-field testing. Our analysis shows that we can eliminate the burn-in processwhen we have some spare cores for in-field recovery. We demonstrate that a high defect coverage for in-field testing, a necessity for supporting in-field recovery, is essentialfor overall cost reduction. We also illustrate that, with in-field recovery capability, the reliance on high quality manufacturing testing is significantly reduced.

Original languageEnglish
Title of host publicationProceedings - International Test Conference 2008, ITC 2008
DOIs
Publication statusPublished - 2008
Externally publishedYes
EventInternational Test Conference 2008, ITC 2008 - Santa Clara, CA, United States
Duration: 28 Oct 200830 Oct 2008

Publication series

NameProceedings - International Test Conference
ISSN (Print)1089-3539

Conference

ConferenceInternational Test Conference 2008, ITC 2008
Country/TerritoryUnited States
CitySanta Clara, CA
Period28/10/0830/10/08

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