A Framework to Evaluate Technology and Device Design Enhancements for MOS Integrated Circuits

Charles G. Sodini; S. Simon Wong; Ping Keung Ko

doi:10.1109/4.16311

A Framework to Evaluate Technology and Device Design Enhancements for MOS Integrated Circuits

Charles G. Sodini, S. Simon Wong, Ping Keung Ko

Research output: Contribution to journal › Journal Article › peer-review

12 Citations (Scopus)

Abstract

A hierarchical framework which connects device and technology design parameters to specific circuit applications is presented. A comprehensive list of functional circuit blocks which are used in the framework is defined. Examples of the use of this framework for designintensive circuits are given. In these specific examples, experimental data are presented which show the impact of device design on particular circuit applications. Technology-intensive circuit examples are also given which demonstrate the effect of technology enhancements on specific circuit applications. This framework and the device and technology data will help circuit designers evaluate the impact of specific device and technology improvements on particular circuit and system requirements.

Original language	English
Pages (from-to)	118-127
Number of pages	10
Journal	IEEE Journal of Solid-State Circuits
Volume	24
Issue number	1
DOIs	https://doi.org/10.1109/4.16311
Publication status	Published - Feb 1989
Externally published	Yes

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A Framework to Evaluate Technology and Device Design Enhancements for MOS Integrated Circuits

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