A Fully Integrated 0.27-THz Injection-Locked Frequency Synthesizer with Frequency-Tracking Loop in 65-nm CMOS

Xiaolong Liu*, Howard C. Luong

*Corresponding author for this work

Research output: Contribution to journalJournal Articlepeer-review

Abstract

A fully integrated sub-Terahertz (sub-THz) frequency synthesizer is proposed cascading a radio frequency subsampling phase-locked loop (SS-PLL) with millimeter-wave injection-locked frequency multipliers (ILFMs) and a sub-THz mixer for frequency extension. Enhanced third-harmonic and fourth-harmonic-extraction techniques are proposed for the ILFMs with different multiplication ratios. In addition, a frequency-Tracking loop (FTL) with automatic frequency and amplitude calibration is embedded for the ILFMs. Finally, a distributed bias technique is employed to improve the linearity of the wideband magnetic-Tuning sub-THz oscillator. Designed in a 65-nm CMOS process, the proposed prototype achieves an ultra-wide frequency tuning range from 61.2 to 100.8, 122.4 to 136.8, and 198.5 to 273.6 GHz with a phase noise at 1-MHz offset from-79.3 to-95.4 dBc/Hz and an integrated jitter from 124 to 159 fs over the tuning range. The synthesizer occupies a core area of 0.58 mm2 and measures an output power of-11 dBm at 211.4 GHz with 49.5 mW, corresponding to a dc-To-radio frequency (RF) efficiency of 0.16%, an FoM from-171.4 to-177.7 dBc/Hz, and {\mathrm {FoM}}_{T} from-177 to-190.5 dBc/Hz.

Original languageEnglish
Article number8920090
Pages (from-to)1051-1063
Number of pages13
JournalIEEE Journal of Solid-State Circuits
Volume55
Issue number4
DOIs
Publication statusPublished - Apr 2020

Bibliographical note

Publisher Copyright:
© 1966-2012 IEEE.

Keywords

  • Amplitude calibration
  • frequency calibration
  • frequency synthesizer
  • harmonic extraction
  • injection locking
  • millimeter-wave (mm-Wave)
  • phase-locked loop (PLL)
  • sub-Terahertz (sub-THz)
  • voltage-controlled oscillator (VCO)

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