A fully integrated 900-MHz CMOS wireless receiver with on-chip RF and IF filters and 79-dB image rejection

Chunbing Guo; Chi Wa Lo; Yu Wing Choi; Issac Hsu; Toby Kan; David Leung; Alan Chan; Howard C. Luong

doi:10.1109/JSSC.2002.800981

A fully integrated 900-MHz CMOS wireless receiver with on-chip RF and IF filters and 79-dB image rejection

Chunbing Guo^*, Chi Wa Lo, Yu Wing Choi, Issac Hsu, Toby Kan, David Leung, Alan Chan, Howard C. Luong

^*Corresponding author for this work

Department of Electronic and Computer Engineering

Research output: Contribution to journal › Journal Article › peer-review

43 Citations (Scopus)

Abstract

A monolithic 900-MHz CMOS wireless receiver with on-chip RF and IF filters and a fully integrated fractional-N synthesizer is presented. Implemented in a standard 0.5-μm CMOS process and without any off-chip component, the complete receiver has a measured image rejection of 79 dB, a sensitivity of -90 dBm, and IIP3 of -24 dBm, and a noise figure of 22 dB with a power of 227 mW and a chip area of 5.7 mm ². The synthesizer achieves a phase noise of -118 dBc/Hz at 600 kHz offset and a settling time of less than 150 μs.

Original language	English
Pages (from-to)	1084-1089
Number of pages	6
Journal	IEEE Journal of Solid-State Circuits
Volume	37
Issue number	8
DOIs	https://doi.org/10.1109/JSSC.2002.800981
Publication status	Published - Aug 2002

Keywords

IF filter
Image rejection
RF filter
Receiver
Single chip
Synthesizer
Wireless

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10.1109/JSSC.2002.800981

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title = "A fully integrated 900-MHz CMOS wireless receiver with on-chip RF and IF filters and 79-dB image rejection",

abstract = "A monolithic 900-MHz CMOS wireless receiver with on-chip RF and IF filters and a fully integrated fractional-N synthesizer is presented. Implemented in a standard 0.5-μm CMOS process and without any off-chip component, the complete receiver has a measured image rejection of 79 dB, a sensitivity of -90 dBm, and IIP3 of -24 dBm, and a noise figure of 22 dB with a power of 227 mW and a chip area of 5.7 mm 2. The synthesizer achieves a phase noise of -118 dBc/Hz at 600 kHz offset and a settling time of less than 150 μs.",

keywords = "IF filter, Image rejection, RF filter, Receiver, Single chip, Synthesizer, Wireless",

author = "Chunbing Guo and Lo, \{Chi Wa\} and Choi, \{Yu Wing\} and Issac Hsu and Toby Kan and David Leung and Alan Chan and Luong, \{Howard C.\}",

year = "2002",

month = aug,

doi = "10.1109/JSSC.2002.800981",

language = "English",

volume = "37",

pages = "1084--1089",

journal = "IEEE Journal of Solid-State Circuits",

issn = "0018-9200",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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T1 - A fully integrated 900-MHz CMOS wireless receiver with on-chip RF and IF filters and 79-dB image rejection

AU - Guo, Chunbing

AU - Lo, Chi Wa

AU - Choi, Yu Wing

AU - Hsu, Issac

AU - Kan, Toby

AU - Leung, David

AU - Chan, Alan

AU - Luong, Howard C.

PY - 2002/8

Y1 - 2002/8

N2 - A monolithic 900-MHz CMOS wireless receiver with on-chip RF and IF filters and a fully integrated fractional-N synthesizer is presented. Implemented in a standard 0.5-μm CMOS process and without any off-chip component, the complete receiver has a measured image rejection of 79 dB, a sensitivity of -90 dBm, and IIP3 of -24 dBm, and a noise figure of 22 dB with a power of 227 mW and a chip area of 5.7 mm 2. The synthesizer achieves a phase noise of -118 dBc/Hz at 600 kHz offset and a settling time of less than 150 μs.

AB - A monolithic 900-MHz CMOS wireless receiver with on-chip RF and IF filters and a fully integrated fractional-N synthesizer is presented. Implemented in a standard 0.5-μm CMOS process and without any off-chip component, the complete receiver has a measured image rejection of 79 dB, a sensitivity of -90 dBm, and IIP3 of -24 dBm, and a noise figure of 22 dB with a power of 227 mW and a chip area of 5.7 mm 2. The synthesizer achieves a phase noise of -118 dBc/Hz at 600 kHz offset and a settling time of less than 150 μs.

KW - IF filter

KW - Image rejection

KW - RF filter

KW - Receiver

KW - Single chip

KW - Synthesizer

KW - Wireless

UR - https://www.webofscience.com/wos/woscc/full-record/WOS:000177051200015

UR - https://openalex.org/W2122804317

UR - https://www.scopus.com/pages/publications/0036683903

U2 - 10.1109/JSSC.2002.800981

DO - 10.1109/JSSC.2002.800981

M3 - Journal Article

SN - 0018-9200

VL - 37

SP - 1084

EP - 1089

JO - IEEE Journal of Solid-State Circuits

JF - IEEE Journal of Solid-State Circuits

IS - 8

ER -

A fully integrated 900-MHz CMOS wireless receiver with on-chip RF and IF filters and 79-dB image rejection

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Keywords

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