A novel robust and low-leakage SRAM cell with nine carbon nanotube transistors

A novel static random-access memory (SRAM) cell with nine carbon nanotube MOSFETs (9-CN-MOSFETs) is proposed in this paper. With the new 9-CN-MOSFET SRAM cell, the read data stability is enhanced by 99.09%, while providing similar read speed as compared with the conventional six-transistor (6T) SRAM cell in a 16-nm carbon nanotube transistor technology. The worst-case write voltage margin is increased by 4.57 × and 3.90 × with the proposed 9-CN-MOSFET SRAM cell as compared with the conventional 6T SRAM cell and a previously published eight-transistor (8T) SRAM cell, respectively. A 1 Kibit SRAM array with the new memory cells consumes 34.18% and 12.27% lower leakage power as compared with the memory arrays with 6T and 8T SRAM cells, respectively, in idle mode. The overall electrical quality is enhanced by up to 13.63 × with the proposed 9-CN-MOSFET memory circuit as compared with the other memory cells that are evaluated in this paper.