A power-area-efficient impedance sensor design for 10 × 10 microelectrode array sensing

Xinyuan Ge, Tsz Ngai Lin, Jie Yuan

Research output: Chapter in Book/Conference Proceeding/ReportConference Paper published in a bookpeer-review

Abstract

This paper introduces the design of a power-area-efficient impedance sensor for a microelectrode array (MEA). The proposed architecture uses the quadrature phase integration method to estimate the magnitude and phase of the impedance-related current signal. By implementing a 12-bit 2-stage quantizer, a wide dynamic sensing range from 1 Hz to 100 kHz can be achieved. The sensor is designed in a 0.18 μm CMOS process, achieving < 1.49% error in magnitude measurement and < 0.81° error in phase measurement. The designed sensor consumes 478.8 μW at 1.8 V and occupies 0.04 mm2. A 10 × 10 highly-integrated impedance sensor array is enabled on-chip.

Original languageEnglish
Title of host publicationIEEE International Symposium on Circuits and Systems
Subtitle of host publicationFrom Dreams to Innovation, ISCAS 2017 - Conference Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781467368520
DOIs
Publication statusPublished - 25 Sept 2017
Event50th IEEE International Symposium on Circuits and Systems, ISCAS 2017 - Baltimore, United States
Duration: 28 May 201731 May 2017

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Conference

Conference50th IEEE International Symposium on Circuits and Systems, ISCAS 2017
Country/TerritoryUnited States
CityBaltimore
Period28/05/1731/05/17

Bibliographical note

Publisher Copyright:
© 2017 IEEE.

Keywords

  • EIS
  • Impedance sensor
  • SAR ADC
  • area efficient
  • low power
  • microarray
  • quadrature phase integration

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