A quasi two-dimensional conduction model for polycrystalline silicon thin-film transistor based on discrete grains

A quasi 2-D conduction model based on the thermionic emission of charge carriers over the energy barriers at discrete grain boundaries is formulated for a polycrystalline silicon thin-film transistor with an undoped body. Each grain boundary is characterized by an energy-dispersed density of trap states. The occupied trap states are assumed to form a "line" charge adjacent to the interface of the channel and the gate dielectric of a transistor. The electrostatic potential of a grain boundary is subsequently determined. This general approach allows the modeling of energy barriers in a transistor without deliberate channel doping, and the resulting conduction model is continuously applicable from the "pseudosubthreshold" to the "linear" regime of operation of a transistor. Good agreement between the experimental and the calculated transfer and output characteristics is obtained. The procedure for determining the density of trap states is described and demonstrated. It is found that the energy dependence of the trap states can be approximated by a simple exponential function.