TY - GEN
T1 - A segmented output stage H-bridge IC with tunable gate driver
AU - Yu, J. S.
AU - Zhang, W. J.
AU - Ng, W. T.
PY - 2014
Y1 - 2014
N2 - In this paper, an integrated EDMOS H-bridge that incorporates both segmented output transistors and segmented gate drivers is presented. This fully segmented design approach allows the output resistance of the H-bridge and the output resistance of the gate drivers to be dynamically adjusted. Dynamic adjustment of these parameters allows for the continuous optimization of the power conversion efficiency of the H-bridge over a wide range of output currents. The IC chip is fabricated using TSMC's 0.18 μm BCD Gen-2 process technology. The H-bridge is operated with a 10 V input, 2 V output and a load current between 0.02 A and 4 A. The presented design achieves power conversion efficiency improvements of 32% and 8% at light load current and heavy load current, respectively, when compared to traditional fixed power transistor designs. Furthermore, the dynamically adjustable output resistance of the gate drivers allows for suppression of switching node ringing and conducted EMI (CEMI) by 5.5 dB with no a significant reduction in efficiency.
AB - In this paper, an integrated EDMOS H-bridge that incorporates both segmented output transistors and segmented gate drivers is presented. This fully segmented design approach allows the output resistance of the H-bridge and the output resistance of the gate drivers to be dynamically adjusted. Dynamic adjustment of these parameters allows for the continuous optimization of the power conversion efficiency of the H-bridge over a wide range of output currents. The IC chip is fabricated using TSMC's 0.18 μm BCD Gen-2 process technology. The H-bridge is operated with a 10 V input, 2 V output and a load current between 0.02 A and 4 A. The presented design achieves power conversion efficiency improvements of 32% and 8% at light load current and heavy load current, respectively, when compared to traditional fixed power transistor designs. Furthermore, the dynamically adjustable output resistance of the gate drivers allows for suppression of switching node ringing and conducted EMI (CEMI) by 5.5 dB with no a significant reduction in efficiency.
UR - https://www.webofscience.com/wos/woscc/full-record/WOS:000346735500050
UR - https://openalex.org/W2083164036
UR - https://www.scopus.com/pages/publications/84905484172
U2 - 10.1109/ISPSD.2014.6856012
DO - 10.1109/ISPSD.2014.6856012
M3 - Conference Paper published in a book
SN - 9781479929177
T3 - Proceedings of the International Symposium on Power Semiconductor Devices and ICs
SP - 205
EP - 208
BT - Proceedings of the 26th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2014
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 26th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2014
Y2 - 15 June 2014 through 19 June 2014
ER -