A zero-mask one-time programmable memory array for RFID applications

Randy Barsatan; Tsz Yin Man; Mansun Chan

A zero-mask one-time programmable memory array for RFID applications

Randy Barsatan^*, Tsz Yin Man, Mansun Chan

^*Corresponding author for this work

Department of Electronic and Computer Engineering

Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review

15 Citations (Scopus)

Abstract

A CMOS-compatible One-Time Programmable (OTP) memory array for RFID applications is presented. Three zero-mask Antifuse (AF) devices were evaluated on their feasibility for RFID applications. Among the AFs, the gate oxide AF device can be programmed using only 7μW of peak power and was chosen to form the RFID memory array. A memory array architecture is presented based on a compact 2-transistor cell, together with a programming circuit that does not require special high voltage transistors and consumes zero DC current during programming. The device structures were fabricated in 0.18μm process and were experimentally verified, while circuit simulations were performed using TSMC 0.18μm model on Cadence Analog Artist.

Original language	English
Title of host publication	ISCAS 2006
Subtitle of host publication	2006 IEEE International Symposium on Circuits and Systems, Proceedings
Pages	975-978
Number of pages	4
Publication status	Published - 2006
Event	ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems - Kos, Greece Duration: 21 May 2006 → 24 May 2006

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)	0271-4310

Conference

Conference	ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems
Country/Territory	Greece
City	Kos
Period	21/05/06 → 24/05/06

Cite this

@inproceedings{20fcc200c3d743758efb32cd56d265c0,

title = "A zero-mask one-time programmable memory array for RFID applications",

abstract = "A CMOS-compatible One-Time Programmable (OTP) memory array for RFID applications is presented. Three zero-mask Antifuse (AF) devices were evaluated on their feasibility for RFID applications. Among the AFs, the gate oxide AF device can be programmed using only 7μW of peak power and was chosen to form the RFID memory array. A memory array architecture is presented based on a compact 2-transistor cell, together with a programming circuit that does not require special high voltage transistors and consumes zero DC current during programming. The device structures were fabricated in 0.18μm process and were experimentally verified, while circuit simulations were performed using TSMC 0.18μm model on Cadence Analog Artist.",

author = "Randy Barsatan and Man, \{Tsz Yin\} and Mansun Chan",

year = "2006",

language = "English",

isbn = "0780393902",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

pages = "975--978",

booktitle = "ISCAS 2006",

note = "ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems ; Conference date: 21-05-2006 Through 24-05-2006",

}

Barsatan, R, Man, TY & Chan, M 2006, A zero-mask one-time programmable memory array for RFID applications. in ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, Proceedings., 1692750, Proceedings - IEEE International Symposium on Circuits and Systems, pp. 975-978, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, Kos, Greece, 21/05/06.

A zero-mask one-time programmable memory array for RFID applications. / Barsatan, Randy; Man, Tsz Yin; Chan, Mansun.
ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, Proceedings. 2006. p. 975-978 1692750 (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review

TY - GEN

T1 - A zero-mask one-time programmable memory array for RFID applications

AU - Barsatan, Randy

AU - Man, Tsz Yin

AU - Chan, Mansun

PY - 2006

Y1 - 2006

N2 - A CMOS-compatible One-Time Programmable (OTP) memory array for RFID applications is presented. Three zero-mask Antifuse (AF) devices were evaluated on their feasibility for RFID applications. Among the AFs, the gate oxide AF device can be programmed using only 7μW of peak power and was chosen to form the RFID memory array. A memory array architecture is presented based on a compact 2-transistor cell, together with a programming circuit that does not require special high voltage transistors and consumes zero DC current during programming. The device structures were fabricated in 0.18μm process and were experimentally verified, while circuit simulations were performed using TSMC 0.18μm model on Cadence Analog Artist.

AB - A CMOS-compatible One-Time Programmable (OTP) memory array for RFID applications is presented. Three zero-mask Antifuse (AF) devices were evaluated on their feasibility for RFID applications. Among the AFs, the gate oxide AF device can be programmed using only 7μW of peak power and was chosen to form the RFID memory array. A memory array architecture is presented based on a compact 2-transistor cell, together with a programming circuit that does not require special high voltage transistors and consumes zero DC current during programming. The device structures were fabricated in 0.18μm process and were experimentally verified, while circuit simulations were performed using TSMC 0.18μm model on Cadence Analog Artist.

UR - https://www.scopus.com/pages/publications/34547375255

M3 - Conference Paper published in a book

AN - SCOPUS:34547375255

SN - 0780393902

SN - 9780780393905

T3 - Proceedings - IEEE International Symposium on Circuits and Systems

SP - 975

EP - 978

BT - ISCAS 2006

T2 - ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems

Y2 - 21 May 2006 through 24 May 2006

ER -

A zero-mask one-time programmable memory array for RFID applications

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