Abstract
In this paper, an IGBT gate driver IC with a collector current sensing circuit and an on-chip CPU for digital control is presented. The IC is fabricated using TSMC's 0.18 μm BCD Gen-2 process. This technique is based on the unique Miller plateau relationship between the gate current and collector current (Ig and IC) for a particular gate resistance (Rg), and allows for a cycle by cycle measurement of IC during both turn-on and turn-off transients. Together with a dedicated and simple on-chip stack-based CPU, this technique can potentially provide collector current regulation without any extra discrete component. This technique only monitors the low voltage signal at the gate terminal, without the need to handle any high voltage signal on the collector/load side. Measurements have been carried out using a double pulse test setup. An accuracy within ±1 A is achieved over the current ranges between 1 to 30 A for turn-on and 1 to 50 A for turn-off.
| Original language | English |
|---|---|
| Article number | 7988913 |
| Pages (from-to) | 275-278 |
| Number of pages | 4 |
| Journal | Proceedings of the International Symposium on Power Semiconductor Devices and ICs |
| DOIs | |
| Publication status | Published - 2017 |
| Externally published | Yes |
| Event | 29th International Symposium on Power Semiconductor Devices and IC's, ISPSD 2017 - Sapporo, Japan Duration: 28 May 2017 → 1 Jun 2017 |
Bibliographical note
Publisher Copyright:© 2017 IEEJ.