Abstract
In this paper, we present a delay-locked loop (DLL) technique for performing a combined symbol and sampling clock synchronization in orthogonal frequency division multiplexing (OFDM) systems. In addition, we propose a symbol timing acquisition algorithm for the DLL. It is shown that by using this combined scheme, we can achieve symbol timing recovery and sampling clock adjustment simultaneously. In particular, the symbol timing estimation error variance can be decreased by several orders of magnitude compared with the common correlation methods in both the AWGN and multipath fading channels.
| Original language | English |
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| Title of host publication | 1999 IEEE Wireless Communications and Networking Conference, WCNC |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 1153-1157 |
| Number of pages | 5 |
| ISBN (Electronic) | 0780356683 |
| DOIs | |
| Publication status | Published - 1999 |
| Event | 1st IEEE Annual Wireless Communications and Networking Conference, WCNC 1999 - New Orleans, United States Duration: 21 Sept 1999 → 24 Sept 1999 |
Publication series
| Name | IEEE Wireless Communications and Networking Conference, WCNC |
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| Volume | 3 |
| ISSN (Print) | 1525-3511 |
Conference
| Conference | 1st IEEE Annual Wireless Communications and Networking Conference, WCNC 1999 |
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| Country/Territory | United States |
| City | New Orleans |
| Period | 21/09/99 → 24/09/99 |
Bibliographical note
Publisher Copyright:© 1999 IEEE.