An improved combined symbol and sampling clock synchronization method for OFDM systems

Baoguo Yang*, K. B. Letaief, Roger S. Cheng, Zhigang Cao

*Corresponding author for this work

Research output: Chapter in Book/Conference Proceeding/ReportConference Paper published in a bookpeer-review

28 Citations (Scopus)

Abstract

In this paper, we present a delay-locked loop (DLL) technique for performing a combined symbol and sampling clock synchronization in orthogonal frequency division multiplexing (OFDM) systems. In addition, we propose a symbol timing acquisition algorithm for the DLL. It is shown that by using this combined scheme, we can achieve symbol timing recovery and sampling clock adjustment simultaneously. In particular, the symbol timing estimation error variance can be decreased by several orders of magnitude compared with the common correlation methods in both the AWGN and multipath fading channels.

Original languageEnglish
Title of host publication1999 IEEE Wireless Communications and Networking Conference, WCNC
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1153-1157
Number of pages5
ISBN (Electronic)0780356683
DOIs
Publication statusPublished - 1999
Event1st IEEE Annual Wireless Communications and Networking Conference, WCNC 1999 - New Orleans, United States
Duration: 21 Sept 199924 Sept 1999

Publication series

NameIEEE Wireless Communications and Networking Conference, WCNC
Volume3
ISSN (Print)1525-3511

Conference

Conference1st IEEE Annual Wireless Communications and Networking Conference, WCNC 1999
Country/TerritoryUnited States
CityNew Orleans
Period21/09/9924/09/99

Bibliographical note

Publisher Copyright:
© 1999 IEEE.

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