Abstract
A theoretical analysis of constructing a reconfigurable TEG array is presented in this paper. All possible combinations of 2-TEG and 4-TEG arrays are investigated and the cause of intrinsic maximum power loss is analyzed for some combinations. Based on the analytic induction, an optimized and universal method to construct a reconfigurable TEG array using only resistive switch, and being expandable according to the 2n scale is proposed. The theoretical power transfer efficiency is consistently above 88.8% under a wide range of temperature difference, without the need of bulky off-chip inductors or capacitors. Design considerations to implement the proposed system using standard CMOS 0.13-μm and 0.35-μm processes are also discussed.
| Original language | English |
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| Title of host publication | 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 662-665 |
| Number of pages | 4 |
| ISBN (Electronic) | 9781509015702 |
| DOIs | |
| Publication status | Published - 3 Jan 2017 |
| Event | 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016 - Jeju, Korea, Republic of Duration: 25 Oct 2016 → 28 Oct 2016 |
Publication series
| Name | 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016 |
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Conference
| Conference | 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016 |
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| Country/Territory | Korea, Republic of |
| City | Jeju |
| Period | 25/10/16 → 28/10/16 |
Bibliographical note
Publisher Copyright:© 2016 IEEE.
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