Abstract
In recent years, we have witnessed many excellent machine learning (ML) solutions targeting circuit layouts. These ML models provide fast predictions on various design objectives. However, almost all existing ML solutions have neglected the basic interpretability requirement from potential users. As a result, it is very difficult for users to figure out any potential accuracy degradation or abnormal behaviors of given ML models. In this work, we propose a new technique named APPLE to explain each ML prediction at the resolution level of circuit elements. To the best of our knowledge, this is the first effort to explain ML predictions on circuit layouts. It provides a significantly more reasonable, useful, and efficient explanation for lithography hotspot prediction, compared with the highest-cited prior solution for natural images.
| Original language | English |
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| Title of host publication | ASP-DAC 2024 - 29th Asia and South Pacific Design Automation Conference, Proceedings |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 374-379 |
| Number of pages | 6 |
| ISBN (Electronic) | 9798350393545 |
| DOIs | |
| Publication status | Published - 2024 |
| Event | 29th Asia and South Pacific Design Automation Conference, ASP-DAC 2024 - Incheon, Korea, Republic of Duration: 22 Jan 2024 → 25 Jan 2024 |
Publication series
| Name | Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC |
|---|
Conference
| Conference | 29th Asia and South Pacific Design Automation Conference, ASP-DAC 2024 |
|---|---|
| Country/Territory | Korea, Republic of |
| City | Incheon |
| Period | 22/01/24 → 25/01/24 |
Bibliographical note
Publisher Copyright:© 2024 IEEE.
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