TY - GEN
T1 - Cell-based high-frequency IC design in scaled CMOS
AU - Yue, C. Patrick
AU - Shin, Dong Hun
PY - 2008
Y1 - 2008
N2 - This paper presents a cell-based modeling and design platform for high-frequency analog ICs to shorten design cycle time and to minimize the risk for mask re-spin. Based on a pre-characterized analog sub-circuit cell library, which contains not only active devices and passive components but also routing interconnects. This methodology systematically alleviates modeling inaccuracy at high frequencies due to the difference in the layout between device test structures and actual circuit implementation. By exploiting the modularity in analog circuits at the sub-circuit level, the proposed design platform achieves a balance between design flexibility and modeling accuracy compared. The macro modeling techniques the sub-circuit cells will be described along with measurement results from a characterization test chip.
AB - This paper presents a cell-based modeling and design platform for high-frequency analog ICs to shorten design cycle time and to minimize the risk for mask re-spin. Based on a pre-characterized analog sub-circuit cell library, which contains not only active devices and passive components but also routing interconnects. This methodology systematically alleviates modeling inaccuracy at high frequencies due to the difference in the layout between device test structures and actual circuit implementation. By exploiting the modularity in analog circuits at the sub-circuit level, the proposed design platform achieves a balance between design flexibility and modeling accuracy compared. The macro modeling techniques the sub-circuit cells will be described along with measurement results from a characterization test chip.
UR - https://openalex.org/W2009030706
UR - https://www.scopus.com/pages/publications/60649104259
U2 - 10.1109/ICSICT.2008.4734837
DO - 10.1109/ICSICT.2008.4734837
M3 - Conference Paper published in a book
SN - 9781424421855
T3 - International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT
SP - 1452
EP - 1455
BT - ICSICT 2008 - 2008 9th International Conference on Solid-State and Integrated-Circuit Technology Proceedings
T2 - 2008 9th International Conference on Solid-State and Integrated-Circuit Technology, ICSICT 2008
Y2 - 20 October 2008 through 23 October 2008
ER -