TY - JOUR
T1 - Characterization of Threshold Voltage Shift in SiC MOSFETs Under Nanosecond-Range Switching and Its Impact on High- Frequency Applications
AU - Jiang, Junsong
AU - Tang, Xi
AU - Tan, Kun
AU - Hu, Zhihao
AU - Tian, Mohan
AU - Xu, Yichen
AU - Li, Haoran
AU - Zhu, Wenjie
AU - Li, Hui
AU - Hu, Cungang
AU - Cao, Wenping
N1 - Publisher Copyright:
© 1963-2012 IEEE.
PY - 2024/7/1
Y1 - 2024/7/1
N2 - Dynamic threshold voltage shifts (DTVS) in silicon carbide (SiC) MOSFETs are investigated using an ultrafast characterization method that incorporates nanosecond-range switching. A positive gate bias causes a positive DTVS and a negative gate bias causes a negative DTVS, which is observed within a timescale range of 40 ns-1 s. At a gate bias of -10 V, the negative DTVS can reach approximately -4 V, which changes the threshold voltage from positive to negative. A mechanism involving carrier trapping at/near the SiO2 /SiC interface is proposed. Then, the impact of DTVS on dynamic behavior is evaluated by a double-pulse test (DPT) under different off-state gate biases ({V} -{text {GS,OFF}} ). A negative DTVS causes the channel turn-on earlier, increasing the current overshoot ({I} -{text {OS}} ) during the turn-on process. As {V} -{text {GS,OFF}} decreases from 0 to -10 V, the turn-on loss ({E} -{text {ON}} ) increases by 11.2% at a load current of 10 A. Moreover, the {E} -{text {ON}} changes from an increase to a decrease when the turn-on gate resistance ({R} -{text {G,ON}} ) increases from 10 to 50-Omega . Therefore, for a specific gate driving condition, an optimized {R} -{text {G,ON}} can be chosen to compromise the DTVS-induced {E} -{text {ON}} change.
AB - Dynamic threshold voltage shifts (DTVS) in silicon carbide (SiC) MOSFETs are investigated using an ultrafast characterization method that incorporates nanosecond-range switching. A positive gate bias causes a positive DTVS and a negative gate bias causes a negative DTVS, which is observed within a timescale range of 40 ns-1 s. At a gate bias of -10 V, the negative DTVS can reach approximately -4 V, which changes the threshold voltage from positive to negative. A mechanism involving carrier trapping at/near the SiO2 /SiC interface is proposed. Then, the impact of DTVS on dynamic behavior is evaluated by a double-pulse test (DPT) under different off-state gate biases ({V} -{text {GS,OFF}} ). A negative DTVS causes the channel turn-on earlier, increasing the current overshoot ({I} -{text {OS}} ) during the turn-on process. As {V} -{text {GS,OFF}} decreases from 0 to -10 V, the turn-on loss ({E} -{text {ON}} ) increases by 11.2% at a load current of 10 A. Moreover, the {E} -{text {ON}} changes from an increase to a decrease when the turn-on gate resistance ({R} -{text {G,ON}} ) increases from 10 to 50-Omega . Therefore, for a specific gate driving condition, an optimized {R} -{text {G,ON}} can be chosen to compromise the DTVS-induced {E} -{text {ON}} change.
KW - Double-pulse characterization
KW - nanoseconds
KW - silicon carbide (SiC) MOSFETs
KW - threshold voltage shift
UR - https://www.webofscience.com/wos/woscc/full-record/WOS:001236609700001
UR - https://www.scopus.com/pages/publications/85194855228
U2 - 10.1109/TED.2024.3403956
DO - 10.1109/TED.2024.3403956
M3 - Journal Article
SN - 0018-9383
VL - 71
SP - 4227
EP - 4232
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 7
ER -