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CMOS-compatible zero-mask one time programmable (OTP) memory design

  • Wan Tim Chan
  • , K. P. Ng
  • , M. C. Lee
  • , K. C. Kwong
  • , N. Li
  • , Ricky M.Y. Ng
  • , Tsz Yin MAN
  • , Mansun Chan

Research output: Chapter in Book/Conference Proceeding/ReportConference Paper published in a bookpeer-review

Abstract

A method to design CMOS-compatible diode-based One-Time Programmable (OTP) memory is discussed in this paper. In particular the program disturb problem is resolved by using diode drivers with sufficiently high breakdown voltage. The choices of memory elements and various available diodes in a standard CMOS process are carefully studied to obtain an optimal combination. Different memory cells were fabricated in standard 0.18-μm CMOS technology to verify the functionality of the design.

Original languageEnglish
Title of host publicationICSICT 2008 - 2008 9th International Conference on Solid-State and Integrated-Circuit Technology Proceedings
Pages861-864
Number of pages4
DOIs
Publication statusPublished - 30 Dec 2008
Event2008 9th International Conference on Solid-State and Integrated-Circuit Technology, ICSICT 2008 - Beijing, China
Duration: 20 Oct 200823 Oct 2008

Publication series

NameInternational Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT

Conference

Conference2008 9th International Conference on Solid-State and Integrated-Circuit Technology, ICSICT 2008
Country/TerritoryChina
CityBeijing
Period20/10/0823/10/08

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