Combining synchronous and asynchronous timing schemes for high-performance systems

Research output: Contribution to journal › Editorial

1 Citation (Scopus)

Original language	English
Pages (from-to)	412
Number of pages	1
Journal	IEEE Design and Test of Computers
Volume	24
Issue number	5
DOIs	https://doi.org/10.1109/MDT.2007.158
Publication status	Published - Sept 2007

Access to Document

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title = "Combining synchronous and asynchronous timing schemes for high-performance systems",

author = "Tim Cheng",

year = "2007",

month = sep,

doi = "10.1109/MDT.2007.158",

language = "English",

volume = "24",

pages = "412",

journal = "IEEE Design and Test of Computers",

issn = "0740-7475",

publisher = "IEEE Computer Society",

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AU - Cheng, Tim

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DO - 10.1109/MDT.2007.158

M3 - Editorial

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JO - IEEE Design and Test of Computers

JF - IEEE Design and Test of Computers

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