Efficient Partial-Sum Network Architectures for List Successive-Cancellation Decoding of Polar Codes

Mahsa Mousavi*, Youzhe Fan, Chi Ying Tsui, Jie Jin, Bin Li, Hui Shen

*Corresponding author for this work

Research output: Contribution to journalJournal Articlepeer-review

Abstract

List successive cancellation decoder (LSCD) architectures have been recently proposed for the decoding of polar codes to achieve high decoding performance. However, the existing architectures for updating the partial sums of all the list candidate paths scale linearly with the code length and hence have significant area and delay overhead for polar codes with long code length or list size. In this paper, a list high-performance partial-sum network (LHPPSN) is proposed based on a folded partial-sum network (PSN) architecture of which the complexity does not scale with the code length. A design based on replicating units of high-performance PSN and lazy copying is first presented. To improve the area and performance, a new method based on indices copying is proposed next. In addition, by exploiting the properties of PSN, the complexity is further reduced by sharing the path copying logic. Experimental results show that using the proposed LHPPSN results in more than 70% and 40% reduction in area and delay, respectively, for polar codes with large code length or list size, when compared with the state-of-the-art LSCD PSN architectures.

Original languageEnglish
Pages (from-to)3848-3858
Number of pages11
JournalIEEE Transactions on Signal Processing
Volume66
Issue number14
DOIs
Publication statusPublished - 15 Jul 2018

Bibliographical note

Publisher Copyright:
© 1991-2012 IEEE.

Keywords

  • Polar codes
  • VLSI decoder architectures
  • list decoding
  • partial sum networks
  • successive cancellation decoding

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