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Enhancement-mode Ga2O3 MOSFETs with Si-ion-implanted source and drain

  • Man Hoi Wong*
  • , Yoshiaki Nakata
  • , Akito Kuramata
  • , Shigenobu Yamakoshi
  • , Masataka Higashiwaki
  • *Corresponding author for this work

Research output: Contribution to journalJournal Articlepeer-review

Abstract

Enhancement-mode β-Ga2O3 metal-oxide-semiconductor field-effect transistors with low series resistance were achieved by Si-ion implantation doping of the source/drain contacts and access regions. An unintentionally doped Ga2O3 channel with low background carrier concentration that was fully depleted at a gate bias of 0 V gave rise to a positive threshold voltage without additional constraints on the channel dimensions or device architecture. Transistors with a channel length of 4 μm delivered a maximum drain current density (IDS) of 1.4 mA/mm and an IDS on/off ratio near 106. Nonidealities associated with the Al2O3 gate dielectric as well as their impact on enhancement-mode device performance are discussed.

Original languageEnglish
Article number041101
JournalApplied Physics Express
Volume10
Issue number4
DOIs
Publication statusPublished - Apr 2017
Externally publishedYes

Bibliographical note

Publisher Copyright:
© 2017 The Japan Society of Applied Physics.

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