Feasibility study of fan-out panel-level packaging for heterogeneous integrations

Cheng Ta Ko; Henry Yang; John H. Lau; Ming Li; Curry Lin; Chieh Lin Chang; Jhih Yuan Pan; Hsing Hui Wu; Iris Xu; Tony Chen; Zhang Li; Kim Hwee Tan; Penny Lo; R. So; Y. H. Chen; Nelson Fan; Eric Kuah; Marc Lin; Y. M. Cheung; Eric Ng; Cao Xi; Rozalia Beica; Sze Pei Lim; N. C. Lee; Mian Tao; Jeffery Lo; Ricky Lee

doi:10.1109/ECTC.2019.00010

Feasibility study of fan-out panel-level packaging for heterogeneous integrations

Cheng Ta Ko, Henry Yang, John H. Lau, Ming Li, Curry Lin, Chieh Lin Chang, Jhih Yuan Pan, Hsing Hui Wu, Iris Xu, Tony Chen, Zhang Li, Kim Hwee Tan, Penny Lo, R. So, Y. H. Chen, Nelson Fan, Eric Kuah, Marc Lin, Y. M. Cheung, Eric NgCao Xi, Rozalia Beica, Sze Pei Lim, N. C. Lee, Mian Tao, Jeffery Lo, Ricky Lee

Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review

8 Citations (Scopus)

Abstract

The design, materials, process, and fabrication of a heterogeneous integration of 4 chips by a FOPLP (fan-out panel-level packaging) with chip-first and dies face-down formation are investigated in this study. Emphasis is placed on the application of a new assembly process and materials for fabricating the RDLs (redistribution layers) of the FOPLP. The panel size is 508mm x 508mm. The epoxy molding compound (EMC) is a dry-film material and is molded by lamination method. The minimum metal line width and spacing is 10μm and they are fabricated by printed circuit board (PCB) method and equipment.

Original language	English
Title of host publication	Proceedings - IEEE 69th Electronic Components and Technology Conference, ECTC 2019
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	14-20
Number of pages	7
ISBN (Electronic)	9781728114989
DOIs	https://doi.org/10.1109/ECTC.2019.00010
Publication status	Published - May 2019
Event	69th IEEE Electronic Components and Technology Conference, ECTC 2019 - Las Vegas, United States Duration: 28 May 2019 → 31 May 2019

Publication series

Name	Proceedings - Electronic Components and Technology Conference
Volume	2019-May
ISSN (Print)	0569-5503

Conference

Conference	69th IEEE Electronic Components and Technology Conference, ECTC 2019
Country/Territory	United States
City	Las Vegas
Period	28/05/19 → 31/05/19

Bibliographical note

Publisher Copyright:
© 2019 IEEE.

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10.1109/ECTC.2019.00010

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Ko, C. T., Yang, H., Lau, J. H., Li, M., Lin, C., Chang, C. L., Pan, J. Y., Wu, H. H., Xu, I., Chen, T., Li, Z., Tan, K. H., Lo, P., So, R., Chen, Y. H., Fan, N., Kuah, E., Lin, M., Cheung, Y. M., ... Lee, R. (2019). Feasibility study of fan-out panel-level packaging for heterogeneous integrations. In Proceedings - IEEE 69th Electronic Components and Technology Conference, ECTC 2019 (pp. 14-20). Article 8811162 (Proceedings - Electronic Components and Technology Conference; Vol. 2019-May). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ECTC.2019.00010

@inproceedings{8d3f0a1d4545450887842d40c1fbd5cd,

title = "Feasibility study of fan-out panel-level packaging for heterogeneous integrations",

abstract = "The design, materials, process, and fabrication of a heterogeneous integration of 4 chips by a FOPLP (fan-out panel-level packaging) with chip-first and dies face-down formation are investigated in this study. Emphasis is placed on the application of a new assembly process and materials for fabricating the RDLs (redistribution layers) of the FOPLP. The panel size is 508mm x 508mm. The epoxy molding compound (EMC) is a dry-film material and is molded by lamination method. The minimum metal line width and spacing is 10μm and they are fabricated by printed circuit board (PCB) method and equipment.",

author = "Ko, \{Cheng Ta\} and Henry Yang and Lau, \{John H.\} and Ming Li and Curry Lin and Chang, \{Chieh Lin\} and Pan, \{Jhih Yuan\} and Wu, \{Hsing Hui\} and Iris Xu and Tony Chen and Zhang Li and Tan, \{Kim Hwee\} and Penny Lo and R. So and Chen, \{Y. H.\} and Nelson Fan and Eric Kuah and Marc Lin and Cheung, \{Y. M.\} and Eric Ng and Cao Xi and Rozalia Beica and Lim, \{Sze Pei\} and Lee, \{N. C.\} and Mian Tao and Jeffery Lo and Ricky Lee",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 69th IEEE Electronic Components and Technology Conference, ECTC 2019 ; Conference date: 28-05-2019 Through 31-05-2019",

year = "2019",

month = may,

doi = "10.1109/ECTC.2019.00010",

language = "English",

series = "Proceedings - Electronic Components and Technology Conference",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "14--20",

booktitle = "Proceedings - IEEE 69th Electronic Components and Technology Conference, ECTC 2019",

}

Ko, CT, Yang, H, Lau, JH, Li, M, Lin, C, Chang, CL, Pan, JY, Wu, HH, Xu, I, Chen, T, Li, Z, Tan, KH, Lo, P, So, R, Chen, YH, Fan, N, Kuah, E, Lin, M, Cheung, YM, Ng, E, Xi, C, Beica, R, Lim, SP, Lee, NC, Tao, M, Lo, J & Lee, R 2019, Feasibility study of fan-out panel-level packaging for heterogeneous integrations. in Proceedings - IEEE 69th Electronic Components and Technology Conference, ECTC 2019., 8811162, Proceedings - Electronic Components and Technology Conference, vol. 2019-May, Institute of Electrical and Electronics Engineers Inc., pp. 14-20, 69th IEEE Electronic Components and Technology Conference, ECTC 2019, Las Vegas, United States, 28/05/19. https://doi.org/10.1109/ECTC.2019.00010

Feasibility study of fan-out panel-level packaging for heterogeneous integrations. / Ko, Cheng Ta; Yang, Henry; Lau, John H. et al.
Proceedings - IEEE 69th Electronic Components and Technology Conference, ECTC 2019. Institute of Electrical and Electronics Engineers Inc., 2019. p. 14-20 8811162 (Proceedings - Electronic Components and Technology Conference; Vol. 2019-May).

Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review

TY - GEN

T1 - Feasibility study of fan-out panel-level packaging for heterogeneous integrations

AU - Ko, Cheng Ta

AU - Yang, Henry

AU - Lau, John H.

AU - Li, Ming

AU - Lin, Curry

AU - Chang, Chieh Lin

AU - Pan, Jhih Yuan

AU - Wu, Hsing Hui

AU - Xu, Iris

AU - Chen, Tony

AU - Li, Zhang

AU - Tan, Kim Hwee

AU - Lo, Penny

AU - So, R.

AU - Chen, Y. H.

AU - Fan, Nelson

AU - Kuah, Eric

AU - Lin, Marc

AU - Cheung, Y. M.

AU - Ng, Eric

AU - Xi, Cao

AU - Beica, Rozalia

AU - Lim, Sze Pei

AU - Lee, N. C.

AU - Tao, Mian

AU - Lo, Jeffery

AU - Lee, Ricky

PY - 2019/5

Y1 - 2019/5

N2 - The design, materials, process, and fabrication of a heterogeneous integration of 4 chips by a FOPLP (fan-out panel-level packaging) with chip-first and dies face-down formation are investigated in this study. Emphasis is placed on the application of a new assembly process and materials for fabricating the RDLs (redistribution layers) of the FOPLP. The panel size is 508mm x 508mm. The epoxy molding compound (EMC) is a dry-film material and is molded by lamination method. The minimum metal line width and spacing is 10μm and they are fabricated by printed circuit board (PCB) method and equipment.

AB - The design, materials, process, and fabrication of a heterogeneous integration of 4 chips by a FOPLP (fan-out panel-level packaging) with chip-first and dies face-down formation are investigated in this study. Emphasis is placed on the application of a new assembly process and materials for fabricating the RDLs (redistribution layers) of the FOPLP. The panel size is 508mm x 508mm. The epoxy molding compound (EMC) is a dry-film material and is molded by lamination method. The minimum metal line width and spacing is 10μm and they are fabricated by printed circuit board (PCB) method and equipment.

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UR - https://openalex.org/W2971338744

UR - https://www.scopus.com/pages/publications/85072272707

U2 - 10.1109/ECTC.2019.00010

DO - 10.1109/ECTC.2019.00010

M3 - Conference Paper published in a book

T3 - Proceedings - Electronic Components and Technology Conference

SP - 14

EP - 20

BT - Proceedings - IEEE 69th Electronic Components and Technology Conference, ECTC 2019

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 69th IEEE Electronic Components and Technology Conference, ECTC 2019

Y2 - 28 May 2019 through 31 May 2019

ER -

Ko CT, Yang H, Lau JH, Li M, Lin C, Chang CL et al. Feasibility study of fan-out panel-level packaging for heterogeneous integrations. In Proceedings - IEEE 69th Electronic Components and Technology Conference, ECTC 2019. Institute of Electrical and Electronics Engineers Inc. 2019. p. 14-20. 8811162. (Proceedings - Electronic Components and Technology Conference). doi: 10.1109/ECTC.2019.00010

Feasibility study of fan-out panel-level packaging for heterogeneous integrations

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