Abstract
The most computationally demanding block in the digital front end of a software defined radio (SDR) receiver is the channelizer which operates at the highest sampling rate. Finite impulse response (FIR) filters are employed as channel filters in SDR receivers. These channel filters must be less complex and reconfigurable. A new reconfigurable architecture for the implementation of channel filters based on frequency response masking (FRM) technique is proposed in this paper. Our architecture offers multiple levels of reconfigurability in addition to the inherent low complexity features offered by the FRM technique. Design results show that our method offers an average adder reduction of 37% over binary subexpression elimination (BSE) technique and 57% over canonical signed digit (CSD) based techniques.
| Original language | English |
|---|---|
| Article number | 4253189 |
| Pages (from-to) | 2518-2521 |
| Number of pages | 4 |
| Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
| DOIs | |
| Publication status | Published - 2007 |
| Externally published | Yes |
| Event | 2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 - New Orleans, LA, United States Duration: 27 May 2007 → 30 May 2007 |