Guest editorial: Special section on 2010 IEEE custom integrated circuits conference (CICC 2010)

Some of the research papers selected from the 2010 IEEE Custom Integrated Circuits Conference (CICC) held in San Jose, CA, September 2010, are presented. Kuang et al. reports a high-performance dual read port 8-way set associative 6T SRAM with a one clock cycle access latency, in a 32 nm metal-gate partially depleted SOI process technology for low-voltage applications. Waheed et al. propose a technique to improve the spur performance of time-to-digital converter in all-digital phase-locked loops, in particular in the integer-N operation mode. The paper by Zhang et al. discusses an analog integrated circuit to process signals in the emerging field of brain-computer interface applications. The next paper by Ranjbar and Oliaei discusses a low-pass dual-feedback continuous time modulator with a signal transfer function with low sensitivity to coefficients variation. The performance benefits and trade-offs of nonuniformly quantized ADCs applied to high speed serial receivers are explored in the last paper by Kim et al.