Abstract
The effects of gate and drain voltage waveforms on the hotcarrier-induced MOSFET degradation are studied. Drain voltage transients have little effect on the degradation rate. Only the falling edge of the gate pulse in the presence of a high drain voltage enhances the degradation rate. For devices in typical inverter circuits, dc stress results together with the substrate current waveform can predict the degradation rate under ac stress for a wide range of rise and delay times.
| Original language | English |
|---|---|
| Pages (from-to) | 333-335 |
| Number of pages | 3 |
| Journal | IEEE Electron Device Letters |
| Volume | 8 |
| Issue number | 8 |
| DOIs | |
| Publication status | Published - Aug 1987 |
| Externally published | Yes |