Impact of transistor-to-grain size statistics on large-grain polysilicon TFT characteristics

C. F. Cheng; M. C. Poon; C. W. Kok; Mansun Chan

Impact of transistor-to-grain size statistics on large-grain polysilicon TFT characteristics

C. F. Cheng^*, M. C. Poon, C. W. Kok, Mansun Chan

^*Corresponding author for this work

Department of Electronic and Computer Engineering

Research output: Contribution to journal › Conference article published in journal › peer-review

2 Citations (Scopus)

Abstract

A model based on grain-boundary distribution to predict the impact of transistor-to-grain size statistics on transistor performance variation is proposed and extensively verified by experimental data. Using the model, optimization of transistor dimension with respect to grain size to achieve high mobility and low transistor-to-transistor variation to enhance the yield can be performed.

Original language	English
Pages (from-to)	789-790
Number of pages	2
Journal	Technical Digest - International Electron Devices Meeting, IEDM
Publication status	Published - 2004
Event	IEEE International Electron Devices Meeting, 2004 IEDM - San Francisco, CA, United States Duration: 13 Dec 2004 → 15 Dec 2004

Cite this

@article{09f9417e0c674b01b5bfc9f2a1b5f413,

title = "Impact of transistor-to-grain size statistics on large-grain polysilicon TFT characteristics",

abstract = "A model based on grain-boundary distribution to predict the impact of transistor-to-grain size statistics on transistor performance variation is proposed and extensively verified by experimental data. Using the model, optimization of transistor dimension with respect to grain size to achieve high mobility and low transistor-to-transistor variation to enhance the yield can be performed.",

author = "Cheng, \{C. F.\} and Poon, \{M. C.\} and Kok, \{C. W.\} and Mansun Chan",

year = "2004",

language = "English",

pages = "789--790",

journal = "Technical Digest - International Electron Devices Meeting, IEDM",

issn = "0163-1918",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "IEEE International Electron Devices Meeting, 2004 IEDM ; Conference date: 13-12-2004 Through 15-12-2004",

}

TY - JOUR

T1 - Impact of transistor-to-grain size statistics on large-grain polysilicon TFT characteristics

AU - Cheng, C. F.

AU - Poon, M. C.

AU - Kok, C. W.

AU - Chan, Mansun

PY - 2004

Y1 - 2004

N2 - A model based on grain-boundary distribution to predict the impact of transistor-to-grain size statistics on transistor performance variation is proposed and extensively verified by experimental data. Using the model, optimization of transistor dimension with respect to grain size to achieve high mobility and low transistor-to-transistor variation to enhance the yield can be performed.

AB - A model based on grain-boundary distribution to predict the impact of transistor-to-grain size statistics on transistor performance variation is proposed and extensively verified by experimental data. Using the model, optimization of transistor dimension with respect to grain size to achieve high mobility and low transistor-to-transistor variation to enhance the yield can be performed.

UR - https://www.scopus.com/pages/publications/21644456202

M3 - Conference article published in journal

AN - SCOPUS:21644456202

SN - 0163-1918

SP - 789

EP - 790

JO - Technical Digest - International Electron Devices Meeting, IEDM

JF - Technical Digest - International Electron Devices Meeting, IEDM

T2 - IEEE International Electron Devices Meeting, 2004 IEDM

Y2 - 13 December 2004 through 15 December 2004

ER -

Impact of transistor-to-grain size statistics on large-grain polysilicon TFT characteristics

Abstract

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