Issues in designing truly scalable interconnection networks

Lionel M. Ni*

*Corresponding author for this work

Research output: Chapter in Book/Conference Proceeding/ReportConference Paper published in a bookpeer-review

25 Citations (Scopus)

Abstract

Interconnection networks have been extensively studied in the computer architecture community as they are essential to the performance of parallel processing computing platforms. However, this research area has also been criticized for producing many practically useless research results, which hinder the needed progress in this area. This paper begins with a new classification of interconnection networks and then discusses major practical issues in the design of interconnection networks. The emphasis will be on "truly scalable" interconnection networks. A more practical definition of "incremental scalability" is elaborated. Just like the evolution of microprocessors, as technology advances, the architecture of interconnection networks may also change. Understanding those technological constraints and performance demands is important to future research in this area.

Original languageEnglish
Title of host publicationProceedings of the 1996 ICPP Workshop on Challenges for Parallel Processing, ICPPW 1996
EditorsH.J. Siegel
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages74-83
Number of pages10
ISBN (Electronic)081867623X
DOIs
Publication statusPublished - 1996
Externally publishedYes
Event1996 ICPP Workshop on Challenges for Parallel Processing, ICPPW 1996 - Ithaca, United States
Duration: 12 Aug 199612 Aug 1996

Publication series

NameProceedings of the International Conference on Parallel Processing Workshops
ISSN (Print)1530-2016

Conference

Conference1996 ICPP Workshop on Challenges for Parallel Processing, ICPPW 1996
Country/TerritoryUnited States
CityIthaca
Period12/08/9612/08/96

Bibliographical note

Publisher Copyright:
© 1996 IEEE.

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