Low-Phase-Error Offset-Compensated Switch Ed-Capacitor Integrator

W. H. Ki; G. C. Temes

doi:10.1049/el:19900624

Low-Phase-Error Offset-Compensated Switch Ed-Capacitor Integrator

W. H. Ki, G. C. Temes

Research output: Contribution to journal › Journal Article › peer-review

13 Citations (Scopus)

Abstract

A modification of the offset-compensated switched-capacitor integrator is described. The resulting circuit has a reduced delay and low gain distortion. It also retains the simplicity and low phase errors of earlier schemes.

Original language	English
Pages (from-to)	957-959
Number of pages	3
Journal	Electronics Letters
Volume	26
Issue number	13
DOIs	https://doi.org/10.1049/el:19900624
Publication status	Published - 1 Sept 1990
Externally published	Yes

Keywords

Circuit theory and design
Switched-capacitor networks

Access to Document

10.1049/el:19900624

Cite this

@article{b4f4179b7cdf433a8a0323e824753b05,

title = "Low-Phase-Error Offset-Compensated Switch Ed-Capacitor Integrator",

abstract = "A modification of the offset-compensated switched-capacitor integrator is described. The resulting circuit has a reduced delay and low gain distortion. It also retains the simplicity and low phase errors of earlier schemes.",

keywords = "Circuit theory and design, Switched-capacitor networks",

author = "Ki, \{W. H.\} and Temes, \{G. C.\}",

year = "1990",

month = sep,

day = "1",

doi = "10.1049/el:19900624",

language = "English",

volume = "26",

pages = "957--959",

journal = "Electronics Letters",

issn = "0013-5194",

publisher = "John Wiley \& Sons Inc.",

number = "13",

}

TY - JOUR

T1 - Low-Phase-Error Offset-Compensated Switch Ed-Capacitor Integrator

AU - Ki, W. H.

AU - Temes, G. C.

PY - 1990/9/1

Y1 - 1990/9/1

N2 - A modification of the offset-compensated switched-capacitor integrator is described. The resulting circuit has a reduced delay and low gain distortion. It also retains the simplicity and low phase errors of earlier schemes.

AB - A modification of the offset-compensated switched-capacitor integrator is described. The resulting circuit has a reduced delay and low gain distortion. It also retains the simplicity and low phase errors of earlier schemes.

KW - Circuit theory and design

KW - Switched-capacitor networks

UR - https://www.webofscience.com/wos/woscc/full-record/WOS:A1990DM82200082

UR - https://openalex.org/W2058603623

UR - https://www.scopus.com/pages/publications/0025444977

U2 - 10.1049/el:19900624

DO - 10.1049/el:19900624

M3 - Journal Article

SN - 0013-5194

VL - 26

SP - 957

EP - 959

JO - Electronics Letters

JF - Electronics Letters

IS - 13

ER -

Low-Phase-Error Offset-Compensated Switch Ed-Capacitor Integrator

Abstract

Keywords

Access to Document

Other files and links

Cite this