Abstract
This paper presents a compact 4:1 ratio transformer-based balun design in 65-nm CMOS process. The insertion loss is lower than 1.5 dB from 56 GHz to 64 GHz. The balun also serves as a matching network between the output of mixer and chip output terminal. By choosing appropriate inductance ratio and mutual coupling coefficient, the impedance transforms from (52.9+j85.8) ω to (29.1+j4.7) ω. Cascade ABCD parameter de-embedding technique is applied to remove the connection parasitic effects in the testing structure.
| Original language | English |
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| Title of host publication | 2015 IEEE International Wireless Symposium, IWS 2015 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (Electronic) | 9781479919284 |
| DOIs | |
| Publication status | Published - 22 Jul 2015 |
| Event | IEEE International Wireless Symposium, IWS 2015 - Shenzhen, China Duration: 30 Mar 2015 → 1 Apr 2015 |
Publication series
| Name | 2015 IEEE International Wireless Symposium, IWS 2015 |
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Conference
| Conference | IEEE International Wireless Symposium, IWS 2015 |
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| Country/Territory | China |
| City | Shenzhen |
| Period | 30/03/15 → 1/04/15 |
Bibliographical note
Publisher Copyright:© 2015 IEEE.
Keywords
- CMOS
- balun
- impedance matching
- millimeter wave devices