Abstract
Based on experimental data and physical understanding of the narrow width effect of source/drain parasitic series resistance of LDD MOSFETs, dimension and bias dependent models of R(ds) are derived and discussed. A simplified model for an IC simulator is proposed for the first time. The new R(ds) model is compared with the measurement data for wide ranges of W and V-bs for several technologies. Excellent accuracy is found with all the technologies tested. The model is implemented in BSIM3v3. Copyright (C) 1996 Elsevier Science Ltd
| Original language | English |
|---|---|
| Journal | Solid-State Electronics |
| Publication status | Published - 1996 |
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