TY - GEN
T1 - Modeling yield, cost, and quality of an NoC with uniformly and non-uniformly distributed redundancy
AU - Shamshiri, Saeed
AU - Cheng, Kwang Ting
PY - 2010
Y1 - 2010
N2 - In this paper, we propose a quality metric for an NoC and model the yield and cost of a spare-enhanced multicore chip subject to a given quality constraint. Our experiments show that the overall quality of a mesh-based NoC depends more on the reliability of the inner links than the outer links; therefore, a non-uniform distribution of spare wires could be more effective and cost efficient than a uniform approach.
AB - In this paper, we propose a quality metric for an NoC and model the yield and cost of a spare-enhanced multicore chip subject to a given quality constraint. Our experiments show that the overall quality of a mesh-based NoC depends more on the reliability of the inner links than the outer links; therefore, a non-uniform distribution of spare wires could be more effective and cost efficient than a uniform approach.
KW - NoC
KW - Non-uniform spare distributtion
KW - Quality analysis
KW - SoC
KW - Yield and cost modeling
UR - https://openalex.org/W2137476061
UR - https://www.scopus.com/pages/publications/77953890052
U2 - 10.1109/VTS.2010.5469579
DO - 10.1109/VTS.2010.5469579
M3 - Conference Paper published in a book
SN - 9781424466481
T3 - Proceedings of the IEEE VLSI Test Symposium
SP - 194
EP - 199
BT - Proceedings - 28th IEEE VLSI Test Symposium, VTS10
T2 - 28th IEEE VLSI Test Symposium, VTS10
Y2 - 19 April 2010 through 22 April 2010
ER -