Multi-bit MONOS nonvolatile memory based on double-gate technology

Alain Chun; Keung Chan; Kam Hung Yuen; Tsz Yin Man; Mansun Chan

Multi-bit MONOS nonvolatile memory based on double-gate technology

Alain Chun^*
, Keung Chan
, Kam Hung Yuen
, Tsz Yin Man
, Mansun Chan

^*Corresponding author for this work

Department of Electronic and Computer Engineering

Research output: Contribution to conference › Conference Paper › peer-review

1 Citation (Scopus)

Abstract

A multi-bits/cell double gate oxide-nitride-oxide nonvolatile memory is proposed and demonstrated by numerical device simulation. The operational mechanisms including read, program, erase and inhibit in an array structure are studied in detail. This multi-bits storage capability per single cell is very suitable for high density NVM application. With a slight modification, the proposed structure can achieve double program/read rate by programming/reading 2 bits of the memory cell simultaneously.

Original language	English
Pages	691-694
Number of pages	4
Publication status	Published - 2004
Event	2004 7th International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT 2004 - Beijing, China Duration: 18 Oct 2004 → 21 Oct 2004

Conference

Conference	2004 7th International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT 2004
Country/Territory	China
City	Beijing
Period	18/10/04 → 21/10/04

Cite this

@conference{5b225e0754c941e39e3ede689fa5efc5,

title = "Multi-bit MONOS nonvolatile memory based on double-gate technology",

abstract = "A multi-bits/cell double gate oxide-nitride-oxide nonvolatile memory is proposed and demonstrated by numerical device simulation. The operational mechanisms including read, program, erase and inhibit in an array structure are studied in detail. This multi-bits storage capability per single cell is very suitable for high density NVM application. With a slight modification, the proposed structure can achieve double program/read rate by programming/reading 2 bits of the memory cell simultaneously.",

author = "Alain Chun and Keung Chan and Yuen, \{Kam Hung\} and Man, \{Tsz Yin\} and Mansun Chan",

year = "2004",

language = "English",

pages = "691--694",

note = "2004 7th International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT 2004 ; Conference date: 18-10-2004 Through 21-10-2004",

}

TY - CONF

T1 - Multi-bit MONOS nonvolatile memory based on double-gate technology

AU - Chun, Alain

AU - Chan, Keung

AU - Yuen, Kam Hung

AU - Man, Tsz Yin

AU - Chan, Mansun

PY - 2004

Y1 - 2004

N2 - A multi-bits/cell double gate oxide-nitride-oxide nonvolatile memory is proposed and demonstrated by numerical device simulation. The operational mechanisms including read, program, erase and inhibit in an array structure are studied in detail. This multi-bits storage capability per single cell is very suitable for high density NVM application. With a slight modification, the proposed structure can achieve double program/read rate by programming/reading 2 bits of the memory cell simultaneously.

AB - A multi-bits/cell double gate oxide-nitride-oxide nonvolatile memory is proposed and demonstrated by numerical device simulation. The operational mechanisms including read, program, erase and inhibit in an array structure are studied in detail. This multi-bits storage capability per single cell is very suitable for high density NVM application. With a slight modification, the proposed structure can achieve double program/read rate by programming/reading 2 bits of the memory cell simultaneously.

UR - https://www.scopus.com/pages/publications/21644479333

M3 - Conference Paper

AN - SCOPUS:21644479333

SP - 691

EP - 694

T2 - 2004 7th International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT 2004

Y2 - 18 October 2004 through 21 October 2004

ER -

Multi-bit MONOS nonvolatile memory based on double-gate technology

Abstract

Conference

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