Abstract
This paper investigates the design of very low complexity multiplierless linear phase FIR filters for use in the channelizer of multi-standard software defined radios. A technique for reducing the hardware complexity of linear phase FIR digital filters which minimizes the adder depth and the number of adders in the multiplier block is introduced and is used to implement a multistage, multi-standard decimating filter. The design reuses components for different communications standards and is thus ideal for use in systems which support dynamic reconfiguration.
| Original language | English |
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| Title of host publication | Proceedings of the 2008 IEEE 10th Workshop on Multimedia Signal Processing, MMSP 2008 |
| Pages | 815-819 |
| Number of pages | 5 |
| DOIs | |
| Publication status | Published - 2008 |
| Externally published | Yes |
| Event | 2008 IEEE 10th Workshop on Multimedia Signal Processing, MMSP 2008 - Cairns, QLD, Australia Duration: 8 Oct 2008 → 10 Oct 2008 |
Publication series
| Name | Proceedings of the 2008 IEEE 10th Workshop on Multimedia Signal Processing, MMSP 2008 |
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Conference
| Conference | 2008 IEEE 10th Workshop on Multimedia Signal Processing, MMSP 2008 |
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| Country/Territory | Australia |
| City | Cairns, QLD |
| Period | 8/10/08 → 10/10/08 |