NP dynamic CMOS resurrection with carbon nanotube field effect transistors

Yanan Sun; Volkan Kursun

doi:10.1109/ISOCC.2012.6406913

NP dynamic CMOS resurrection with carbon nanotube field effect transistors

Yanan Sun^*, Volkan Kursun

^*Corresponding author for this work

Department of Electronic and Computer Engineering

Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review

2 Citations (Scopus)

Abstract

Low-power, compact, and high-performance NP dynamic CMOS circuits implemented with a 16nm carbon nanotube transistor technology are presented in this paper. The performances of NP dynamic CMOS full adders based on 16nm carbon nanotube MOSFETs (CN-MOSFETs) and 16nm conventional silicon MOSFETs (Si-MOSFETs) are compared. The dynamic switching power consumption, the leakage power consumption, and the total area are reduced by 53.38%, 95.10%, and 68.96%, respectively, with the CN-MOSFET technology while providing similar propagation delay as compared to the Si-MOSFET NP dynamic CMOS full adder.

Original language	English
Title of host publication	ISOCC 2012 - 2012 International SoC Design Conference
Pages	13-16
Number of pages	4
DOIs	https://doi.org/10.1109/ISOCC.2012.6406913
Publication status	Published - 2012
Event	2012 International SoC Design Conference, ISOCC 2012 - Jeju Island, Korea, Republic of Duration: 4 Nov 2012 → 7 Nov 2012

Publication series

Name	ISOCC 2012 - 2012 International SoC Design Conference

Conference

Conference	2012 International SoC Design Conference, ISOCC 2012
Country/Territory	Korea, Republic of
City	Jeju Island
Period	4/11/12 → 7/11/12

Keywords

carbon nanotube transistor technology
electron mobility
high performance
hole mobility
low power
NP dynamic CMOS

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10.1109/ISOCC.2012.6406913

Cite this

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title = "NP dynamic CMOS resurrection with carbon nanotube field effect transistors",

abstract = "Low-power, compact, and high-performance NP dynamic CMOS circuits implemented with a 16nm carbon nanotube transistor technology are presented in this paper. The performances of NP dynamic CMOS full adders based on 16nm carbon nanotube MOSFETs (CN-MOSFETs) and 16nm conventional silicon MOSFETs (Si-MOSFETs) are compared. The dynamic switching power consumption, the leakage power consumption, and the total area are reduced by 53.38\%, 95.10\%, and 68.96\%, respectively, with the CN-MOSFET technology while providing similar propagation delay as compared to the Si-MOSFET NP dynamic CMOS full adder.",

keywords = "carbon nanotube transistor technology, electron mobility, high performance, hole mobility, low power, NP dynamic CMOS",

author = "Yanan Sun and Volkan Kursun",

year = "2012",

doi = "10.1109/ISOCC.2012.6406913",

language = "English",

isbn = "9781467329880",

series = "ISOCC 2012 - 2012 International SoC Design Conference",

pages = "13--16",

booktitle = "ISOCC 2012 - 2012 International SoC Design Conference",

note = "2012 International SoC Design Conference, ISOCC 2012 ; Conference date: 04-11-2012 Through 07-11-2012",

}

Sun, Y & Kursun, V 2012, NP dynamic CMOS resurrection with carbon nanotube field effect transistors. in ISOCC 2012 - 2012 International SoC Design Conference., 6406913, ISOCC 2012 - 2012 International SoC Design Conference, pp. 13-16, 2012 International SoC Design Conference, ISOCC 2012, Jeju Island, Korea, Republic of, 4/11/12. https://doi.org/10.1109/ISOCC.2012.6406913

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AU - Sun, Yanan

AU - Kursun, Volkan

PY - 2012

Y1 - 2012

N2 - Low-power, compact, and high-performance NP dynamic CMOS circuits implemented with a 16nm carbon nanotube transistor technology are presented in this paper. The performances of NP dynamic CMOS full adders based on 16nm carbon nanotube MOSFETs (CN-MOSFETs) and 16nm conventional silicon MOSFETs (Si-MOSFETs) are compared. The dynamic switching power consumption, the leakage power consumption, and the total area are reduced by 53.38%, 95.10%, and 68.96%, respectively, with the CN-MOSFET technology while providing similar propagation delay as compared to the Si-MOSFET NP dynamic CMOS full adder.

AB - Low-power, compact, and high-performance NP dynamic CMOS circuits implemented with a 16nm carbon nanotube transistor technology are presented in this paper. The performances of NP dynamic CMOS full adders based on 16nm carbon nanotube MOSFETs (CN-MOSFETs) and 16nm conventional silicon MOSFETs (Si-MOSFETs) are compared. The dynamic switching power consumption, the leakage power consumption, and the total area are reduced by 53.38%, 95.10%, and 68.96%, respectively, with the CN-MOSFET technology while providing similar propagation delay as compared to the Si-MOSFET NP dynamic CMOS full adder.

KW - carbon nanotube transistor technology

KW - electron mobility

KW - high performance

KW - hole mobility

KW - low power

KW - NP dynamic CMOS

UR - https://www.scopus.com/pages/publications/84873972690

U2 - 10.1109/ISOCC.2012.6406913

DO - 10.1109/ISOCC.2012.6406913

M3 - Conference Paper published in a book

AN - SCOPUS:84873972690

SN - 9781467329880

T3 - ISOCC 2012 - 2012 International SoC Design Conference

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EP - 16

BT - ISOCC 2012 - 2012 International SoC Design Conference

T2 - 2012 International SoC Design Conference, ISOCC 2012

Y2 - 4 November 2012 through 7 November 2012

ER -

NP dynamic CMOS resurrection with carbon nanotube field effect transistors

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Keywords

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