Polycrystalline diamond (PCD) shaving dresser: The ultimate diamond disk (UDD) for CMP pad conditioning

James C. Sung*, Cheng Shiang Chou, Ying Tung Chen, Chih Chung Chou, Yang Liang Pai, Shao Chung Hu, Michael Sung

*Corresponding author for this work

Research output: Contribution to conferenceConference Paperpeer-review

Abstract

All conventional pad conditioners are dressing the CMP pad with discrete diamond grits with random orientation of unleveled tips. As a result, the pad asperities are chaotic with polishing of delicate wafers with brutal force that may disrupt the IC layer. Worse still, as diamond grits are monocrystalline that must penetrate the pad after compression. As plastic deformation region is greatly extended under compression, the pad asperities are severely deformed with original polymers ruptured. Moreover, the transformed polymer is heated and mixed with polishing debris to form a work hardened glazing layer. Hence, the expensive wafer is pressed against compactized garbage dumps during the CMP process that cannot be fine-tuned. With the advent of polycrystalline diamond (PCD) dressers, the pad conditioning can be performed with an unprecedented regularity. The result is a total elimination of "killer asperities" that may scratch the soft copper layer or porous dielectric layer. Moreover, the PCD dressers may be constructed to form a blade shaver so pad disruption during conditioning can be minimized. As a result, the original pad polymers can be preserved for polishing wafers. This ultimate diamond disk (UDD) has transformed stick slipping pad destruction to smooth shaving pad construction. UDD is particularly suitable for dressing CMP pads for polishing 22 nm interconnects, in particularly, with the anticipated debut of 450 mm pancake wafers scheduled for 2012.

Original languageEnglish
Pages425-428
Number of pages4
Publication statusPublished - 2008
Externally publishedYes
Event25th International VLSI Multilevel Interconnection Conference, VMIC 2008 - Fremont, CA, United States
Duration: 28 Oct 200830 Oct 2008

Conference

Conference25th International VLSI Multilevel Interconnection Conference, VMIC 2008
Country/TerritoryUnited States
CityFremont, CA
Period28/10/0830/10/08

Keywords

  • 22 nm
  • 450 mm wafer
  • ADD
  • CMP
  • Moore's Law
  • PCD
  • UDD

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