Reconfigurable architecture for arbitrary sample rate conversion in software defined radios

Navin Michael*, A. P. Vinod

*Corresponding author for this work

Research output: Chapter in Book/Conference Proceeding/ReportConference Paper published in a bookpeer-review

1 Citation (Scopus)

Abstract

Efficient implementation of the sample rate converter is extremely important to reduce the power consumption of software defined radios. This becomes even more important when sigma delta converters are used for the analog to digital conversion due to the very high oversampling rates involved. In a multistandard radio, the sample rate converter should also be capable of handling variable conversion ratios and channel bandwidths. In this paper we propose a simple scheme to efficiently factorize any large arbitrary factor into integral and fractional factors. We also suggest efficient reconfigurable hardware architectures to implement these conversion factors.

Original languageEnglish
Title of host publication2008 IEEE 19th International Symposium on Personal, Indoor and Mobile Radio Communications, PIMRC 2008
DOIs
Publication statusPublished - 2008
Externally publishedYes
Event2008 IEEE 19th International Symposium on Personal, Indoor and Mobile Radio Communications, PIMRC 2008 - Poznan, Poland
Duration: 15 Sept 200818 Sept 2008

Publication series

NameIEEE International Symposium on Personal, Indoor and Mobile Radio Communications, PIMRC

Conference

Conference2008 IEEE 19th International Symposium on Personal, Indoor and Mobile Radio Communications, PIMRC 2008
Country/TerritoryPoland
CityPoznan
Period15/09/0818/09/08

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