SET and RESET state resistance modeling of phase change memory

K. C. Kwong; Frank He; Mansun Chan

doi:10.1109/EDSSC.2009.5394216

SET and RESET state resistance modeling of phase change memory

K. C. Kwong, Frank He, Mansun Chan

Department of Electronic and Computer Engineering

Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review

1 Citation (Scopus)

Abstract

An empirical model for calculating the SET and RESET state resistance of phase change memory (PCM) is developed base on a resistor network method. The model has been extensively compared with numerical simulations with good accuracy. The model can be directly implemented into SPICE for simulating circuits with PCM elements.

Original language	English
Title of host publication	2009 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2009
Pages	461-464
Number of pages	4
DOIs	https://doi.org/10.1109/EDSSC.2009.5394216
Publication status	Published - 2009
Event	2009 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2009 - Xi'an, China Duration: 25 Dec 2009 → 27 Dec 2009

Publication series

Name	2009 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2009

Conference

Conference	2009 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2009
Country/Territory	China
City	Xi'an
Period	25/12/09 → 27/12/09

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10.1109/EDSSC.2009.5394216

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@inproceedings{9d4d55a13d374ce9a9c49843f1bc9b55,

title = "SET and RESET state resistance modeling of phase change memory",

abstract = "An empirical model for calculating the SET and RESET state resistance of phase change memory (PCM) is developed base on a resistor network method. The model has been extensively compared with numerical simulations with good accuracy. The model can be directly implemented into SPICE for simulating circuits with PCM elements.",

author = "Kwong, \{K. C.\} and Frank He and Mansun Chan",

year = "2009",

doi = "10.1109/EDSSC.2009.5394216",

language = "English",

isbn = "9781424442980",

series = "2009 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2009",

pages = "461--464",

booktitle = "2009 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2009",

note = "2009 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2009 ; Conference date: 25-12-2009 Through 27-12-2009",

}

Kwong, KC, He, F & Chan, M 2009, SET and RESET state resistance modeling of phase change memory. in 2009 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2009., 5394216, 2009 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2009, pp. 461-464, 2009 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2009, Xi'an, China, 25/12/09. https://doi.org/10.1109/EDSSC.2009.5394216

SET and RESET state resistance modeling of phase change memory. / Kwong, K. C.; He, Frank; Chan, Mansun.
2009 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2009. 2009. p. 461-464 5394216 (2009 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2009).

Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review

TY - GEN

T1 - SET and RESET state resistance modeling of phase change memory

AU - Kwong, K. C.

AU - He, Frank

AU - Chan, Mansun

PY - 2009

Y1 - 2009

N2 - An empirical model for calculating the SET and RESET state resistance of phase change memory (PCM) is developed base on a resistor network method. The model has been extensively compared with numerical simulations with good accuracy. The model can be directly implemented into SPICE for simulating circuits with PCM elements.

AB - An empirical model for calculating the SET and RESET state resistance of phase change memory (PCM) is developed base on a resistor network method. The model has been extensively compared with numerical simulations with good accuracy. The model can be directly implemented into SPICE for simulating circuits with PCM elements.

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UR - https://openalex.org/W2013221276

UR - https://www.scopus.com/pages/publications/77949602571

U2 - 10.1109/EDSSC.2009.5394216

DO - 10.1109/EDSSC.2009.5394216

M3 - Conference Paper published in a book

SN - 9781424442980

T3 - 2009 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2009

SP - 461

EP - 464

BT - 2009 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2009

T2 - 2009 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2009

Y2 - 25 December 2009 through 27 December 2009

ER -

SET and RESET state resistance modeling of phase change memory

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