Surface-potential-plus approach for next generation CMOS device modeling

Jin He; Xuemei Xi; Hui Wan; Mansun Chan; Ali Niknejad; Chenming Hu

Surface-potential-plus approach for next generation CMOS device modeling

Jin He^*, Xuemei Xi, Hui Wan, Mansun Chan, Ali Niknejad, Chenming Hu

^*Corresponding author for this work

Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review

Abstract

This paper outlines the advanced Surface-Potential-Plus (SPP) approach for the next generation CMOS device modeling. The main object of this approach is to develop a continuous, completely symmetric and accurate advanced charge-based MOS transistor model from the basic device physics including various physics effects. A unified exact inversion charge relation valid for uniform and retrograde doping cases is first obtained. Various small dimensional effects are elucidated and integrated concisely into this model. Comparison with measured data is finally presented to validate the new model. Importantly, it was also extended to UTB and double-gate MOSFETs.

Original language	English
Title of host publication	Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004
Editors	X.P. Qu, G.P. Ru, B.Z. Li, B. Mizuno, H. Iwai
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	321-324
Number of pages	4
Volume	4
ISBN (Print)	7309039157
Publication status	Published - 2004
Externally published	Yes
Event	Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004 - Shanghai, China Duration: 15 Mar 2004 → 16 Mar 2004

Conference

Conference	Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004
Country/Territory	China
City	Shanghai
Period	15/03/04 → 16/03/04

Cite this

He, J., Xi, X., Wan, H., Chan, M., Niknejad, A., & Hu, C. (2004). Surface-potential-plus approach for next generation CMOS device modeling. In X. P. Qu, G. P. Ru, B. Z. Li, B. Mizuno, & H. Iwai (Eds.), Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004 (Vol. 4, pp. 321-324). Institute of Electrical and Electronics Engineers Inc..

@inproceedings{14d8f6ae7f6542b7b52e542110d8ab2d,

title = "Surface-potential-plus approach for next generation CMOS device modeling",

abstract = "This paper outlines the advanced Surface-Potential-Plus (SPP) approach for the next generation CMOS device modeling. The main object of this approach is to develop a continuous, completely symmetric and accurate advanced charge-based MOS transistor model from the basic device physics including various physics effects. A unified exact inversion charge relation valid for uniform and retrograde doping cases is first obtained. Various small dimensional effects are elucidated and integrated concisely into this model. Comparison with measured data is finally presented to validate the new model. Importantly, it was also extended to UTB and double-gate MOSFETs.",

author = "Jin He and Xuemei Xi and Hui Wan and Mansun Chan and Ali Niknejad and Chenming Hu",

year = "2004",

language = "English",

isbn = "7309039157",

volume = "4",

pages = "321--324",

editor = "X.P. Qu and G.P. Ru and B.Z. Li and B. Mizuno and H. Iwai",

booktitle = "Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004 ; Conference date: 15-03-2004 Through 16-03-2004",

}

He, J, Xi, X, Wan, H, Chan, M, Niknejad, A & Hu, C 2004, Surface-potential-plus approach for next generation CMOS device modeling. in XP Qu, GP Ru, BZ Li, B Mizuno & H Iwai (eds), Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004. vol. 4, Institute of Electrical and Electronics Engineers Inc., pp. 321-324, Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004, Shanghai, China, 15/03/04.

Surface-potential-plus approach for next generation CMOS device modeling. / He, Jin; Xi, Xuemei; Wan, Hui et al.
Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004. ed. / X.P. Qu; G.P. Ru; B.Z. Li; B. Mizuno; H. Iwai. Vol. 4 Institute of Electrical and Electronics Engineers Inc., 2004. p. 321-324.

Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review

TY - GEN

T1 - Surface-potential-plus approach for next generation CMOS device modeling

AU - He, Jin

AU - Xi, Xuemei

AU - Wan, Hui

AU - Chan, Mansun

AU - Niknejad, Ali

AU - Hu, Chenming

PY - 2004

Y1 - 2004

N2 - This paper outlines the advanced Surface-Potential-Plus (SPP) approach for the next generation CMOS device modeling. The main object of this approach is to develop a continuous, completely symmetric and accurate advanced charge-based MOS transistor model from the basic device physics including various physics effects. A unified exact inversion charge relation valid for uniform and retrograde doping cases is first obtained. Various small dimensional effects are elucidated and integrated concisely into this model. Comparison with measured data is finally presented to validate the new model. Importantly, it was also extended to UTB and double-gate MOSFETs.

AB - This paper outlines the advanced Surface-Potential-Plus (SPP) approach for the next generation CMOS device modeling. The main object of this approach is to develop a continuous, completely symmetric and accurate advanced charge-based MOS transistor model from the basic device physics including various physics effects. A unified exact inversion charge relation valid for uniform and retrograde doping cases is first obtained. Various small dimensional effects are elucidated and integrated concisely into this model. Comparison with measured data is finally presented to validate the new model. Importantly, it was also extended to UTB and double-gate MOSFETs.

UR - https://www.scopus.com/pages/publications/3543074140

M3 - Conference Paper published in a book

AN - SCOPUS:3543074140

SN - 7309039157

VL - 4

SP - 321

EP - 324

BT - Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004

A2 - Qu, X.P.

A2 - Ru, G.P.

A2 - Li, B.Z.

A2 - Mizuno, B.

A2 - Iwai, H.

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - Extended Abstracts of the Fourth International Workshop on Junction Technology, IWJT 2004

Y2 - 15 March 2004 through 16 March 2004

ER -

Surface-potential-plus approach for next generation CMOS device modeling

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