Test point selection for analog fault diagnosis of unpowered circuit boards

Modern densely loaded circuit boards have posed problems for fault diagnosis with in-circuit testers because only limited physical access to the boards is allowed. In this paper, we present an efficient graph-based test-point selection algorithm for analog fault diagnosis of unpowered circuit boards. In addition to finding the sets of test points that allow one to differentiate between the elements under diagnosis, the algorithm can serve as a design for testability (DfT) guide for circuit board design. Experimental results on some industrial designs show that, in general, access to 50% of the nodes is sufficient to diagnose all the elements.