The impact of device parameter variation on double gate tunneling FET and double gate MOSFET

Lining Zhang; Mansun Chan; Frank He

doi:10.1109/EDSSC.2010.5713698

The impact of device parameter variation on double gate tunneling FET and double gate MOSFET

Lining Zhang^*, Mansun Chan, Frank He

^*Corresponding author for this work

Department of Electronic and Computer Engineering

Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review

14 Citations (Scopus)

Abstract

Impacts of parameter variations on the performance of double-gate (DG) tunneling FET (TFET) and conventional DG MOSFET are investigated by TCAD simulations. The different operation mechanisms determined their sensitivities to parameter variations. Variations in channel doping concentrations, gate oxide thickness, silicon film thickness and offset of gate electrode are studied in this work. It is found that though TFET overcomes the minimum subthreshold swing (SS) limit in conventional MOSFET, it is more sensitive to parameter variation, especially to gate oxide and silicon film thickness.

Original language	English
Title of host publication	2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010
DOIs	https://doi.org/10.1109/EDSSC.2010.5713698
Publication status	Published - 2010
Event	2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010 - Hong Kong, China Duration: 15 Dec 2010 → 17 Dec 2010

Publication series

Name	2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010

Conference

Conference	2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010
Country/Territory	China
City	Hong Kong
Period	15/12/10 → 17/12/10

Keywords

Band to band tunneling
Double gate (DG)
Tunneling FET
Variation

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10.1109/EDSSC.2010.5713698

Cite this

Zhang, L., Chan, M., & He, F. (2010). The impact of device parameter variation on double gate tunneling FET and double gate MOSFET. In 2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010 Article 5713698 (2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010). https://doi.org/10.1109/EDSSC.2010.5713698

@inproceedings{b47c8972838247deab1d9870c58899ce,

title = "The impact of device parameter variation on double gate tunneling FET and double gate MOSFET",

abstract = "Impacts of parameter variations on the performance of double-gate (DG) tunneling FET (TFET) and conventional DG MOSFET are investigated by TCAD simulations. The different operation mechanisms determined their sensitivities to parameter variations. Variations in channel doping concentrations, gate oxide thickness, silicon film thickness and offset of gate electrode are studied in this work. It is found that though TFET overcomes the minimum subthreshold swing (SS) limit in conventional MOSFET, it is more sensitive to parameter variation, especially to gate oxide and silicon film thickness.",

keywords = "Band to band tunneling, Double gate (DG), Tunneling FET, Variation",

author = "Lining Zhang and Mansun Chan and Frank He",

year = "2010",

doi = "10.1109/EDSSC.2010.5713698",

language = "English",

isbn = "9781424499977",

series = "2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010",

booktitle = "2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010",

note = "2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010 ; Conference date: 15-12-2010 Through 17-12-2010",

}

Zhang, L, Chan, M & He, F 2010, The impact of device parameter variation on double gate tunneling FET and double gate MOSFET. in 2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010., 5713698, 2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010, 2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010, Hong Kong, China, 15/12/10. https://doi.org/10.1109/EDSSC.2010.5713698

The impact of device parameter variation on double gate tunneling FET and double gate MOSFET. / Zhang, Lining; Chan, Mansun; He, Frank.
2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010. 2010. 5713698 (2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010).

Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review

TY - GEN

T1 - The impact of device parameter variation on double gate tunneling FET and double gate MOSFET

AU - Zhang, Lining

AU - Chan, Mansun

AU - He, Frank

PY - 2010

Y1 - 2010

N2 - Impacts of parameter variations on the performance of double-gate (DG) tunneling FET (TFET) and conventional DG MOSFET are investigated by TCAD simulations. The different operation mechanisms determined their sensitivities to parameter variations. Variations in channel doping concentrations, gate oxide thickness, silicon film thickness and offset of gate electrode are studied in this work. It is found that though TFET overcomes the minimum subthreshold swing (SS) limit in conventional MOSFET, it is more sensitive to parameter variation, especially to gate oxide and silicon film thickness.

AB - Impacts of parameter variations on the performance of double-gate (DG) tunneling FET (TFET) and conventional DG MOSFET are investigated by TCAD simulations. The different operation mechanisms determined their sensitivities to parameter variations. Variations in channel doping concentrations, gate oxide thickness, silicon film thickness and offset of gate electrode are studied in this work. It is found that though TFET overcomes the minimum subthreshold swing (SS) limit in conventional MOSFET, it is more sensitive to parameter variation, especially to gate oxide and silicon film thickness.

KW - Band to band tunneling

KW - Double gate (DG)

KW - Tunneling FET

KW - Variation

UR - https://openalex.org/W2164803912

UR - https://www.scopus.com/pages/publications/79952509931

U2 - 10.1109/EDSSC.2010.5713698

DO - 10.1109/EDSSC.2010.5713698

M3 - Conference Paper published in a book

SN - 9781424499977

T3 - 2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010

BT - 2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010

T2 - 2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010

Y2 - 15 December 2010 through 17 December 2010

ER -

The impact of device parameter variation on double gate tunneling FET and double gate MOSFET

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Keywords

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