Tristate Memory Cells Using Double-Peaked Fin-Array III-V Tunnel Diodes Monolithically Grown on (001) Silicon Substrates

Yu Han; Qiang Li; Kei May Lau

doi:10.1109/TED.2017.2738675

Tristate Memory Cells Using Double-Peaked Fin-Array III-V Tunnel Diodes Monolithically Grown on (001) Silicon Substrates

Yu Han^*, Qiang Li, Kei May Lau

^*Corresponding author for this work

Division of Emerging Interdisciplinary Areas

Research output: Contribution to journal › Journal Article › peer-review

8 Citations (Scopus)

Abstract

We demonstrate functional tristate memory cells using multipeaked GaAs/InGaAs fin-array tunnel diodes grown on exact (001) Si substrates. On-chip connection of single-peaked tunnel diode arrays produces I-V characteristics with multiple negative-differential resistance regions. We designed and fabricated two types of tristate memory cells. In one design, a double-peaked tunnel diode was used as the drive, and a reverse-biased single-peaked tunnel diode was used as the load. In the other design, the tristate memory cell was realized by the series connection of two forward-biased single-peaked tunnel diodes.

Original language	English
Article number	8012489
Pages (from-to)	4078-4083
Number of pages	6
Journal	IEEE Transactions on Electron Devices
Volume	64
Issue number	10
DOIs	https://doi.org/10.1109/TED.2017.2738675
Publication status	Published - Oct 2017

Bibliographical note

Publisher Copyright:
© 1963-2012 IEEE.

Keywords

GaAs fin-array
memory cell
multivalued logic
tunnel diodes

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10.1109/TED.2017.2738675

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title = "Tristate Memory Cells Using Double-Peaked Fin-Array III-V Tunnel Diodes Monolithically Grown on (001) Silicon Substrates",

abstract = "We demonstrate functional tristate memory cells using multipeaked GaAs/InGaAs fin-array tunnel diodes grown on exact (001) Si substrates. On-chip connection of single-peaked tunnel diode arrays produces I-V characteristics with multiple negative-differential resistance regions. We designed and fabricated two types of tristate memory cells. In one design, a double-peaked tunnel diode was used as the drive, and a reverse-biased single-peaked tunnel diode was used as the load. In the other design, the tristate memory cell was realized by the series connection of two forward-biased single-peaked tunnel diodes.",

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author = "Yu Han and Qiang Li and Lau, \{Kei May\}",

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T1 - Tristate Memory Cells Using Double-Peaked Fin-Array III-V Tunnel Diodes Monolithically Grown on (001) Silicon Substrates

AU - Han, Yu

AU - Li, Qiang

AU - Lau, Kei May

PY - 2017/10

Y1 - 2017/10

N2 - We demonstrate functional tristate memory cells using multipeaked GaAs/InGaAs fin-array tunnel diodes grown on exact (001) Si substrates. On-chip connection of single-peaked tunnel diode arrays produces I-V characteristics with multiple negative-differential resistance regions. We designed and fabricated two types of tristate memory cells. In one design, a double-peaked tunnel diode was used as the drive, and a reverse-biased single-peaked tunnel diode was used as the load. In the other design, the tristate memory cell was realized by the series connection of two forward-biased single-peaked tunnel diodes.

AB - We demonstrate functional tristate memory cells using multipeaked GaAs/InGaAs fin-array tunnel diodes grown on exact (001) Si substrates. On-chip connection of single-peaked tunnel diode arrays produces I-V characteristics with multiple negative-differential resistance regions. We designed and fabricated two types of tristate memory cells. In one design, a double-peaked tunnel diode was used as the drive, and a reverse-biased single-peaked tunnel diode was used as the load. In the other design, the tristate memory cell was realized by the series connection of two forward-biased single-peaked tunnel diodes.

KW - GaAs fin-array

KW - memory cell

KW - multivalued logic

KW - tunnel diodes

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DO - 10.1109/TED.2017.2738675

M3 - Journal Article

SN - 0018-9383

VL - 64

SP - 4078

EP - 4083

JO - IEEE Transactions on Electron Devices

JF - IEEE Transactions on Electron Devices

IS - 10

M1 - 8012489

ER -

Tristate Memory Cells Using Double-Peaked Fin-Array III-V Tunnel Diodes Monolithically Grown on (001) Silicon Substrates

Abstract

Bibliographical note

Keywords

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