Abstract
Gate oxide quality for sub-0.5um applications on 7hin-,Film-5ilicon-On-/nsulator (TFSOI) substrates is described. Intrinsic thermal oxide properties such as I-V, QBD and charge trapping rates, as well as device effective mobilities, of TFSOI are comparable to bulk. However, increased surface micro-roughness on SOI materials leads to a higher thermal oxide defect density relative to that of bulk silicon. The use of wafer polish or stacked thermal/LPCVD oxide is found to be effective in achieving bulk-quality oxide defect densities on TFSOI while maintaining intrinsic I-V, QBD and charge trapping properties.
| Original language | English |
|---|---|
| Pages (from-to) | 735-738 |
| Number of pages | 4 |
| Journal | Technical Digest - International Electron Devices Meeting, IEDM |
| Publication status | Published - 1993 |
| Externally published | Yes |
| Event | Proceedings of the 1993 IEEE International Electron Devices Meeting - Washington, DC, USA Duration: 5 Dec 1993 → 8 Dec 1993 |
Bibliographical note
Publisher Copyright:© 1993 IEEE